Silicon labs Jobs & Career

Engineering Manager - Full Stack Development (Proficient in Python)

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

2-8 years

vs code Confluence python Nginx Reactjs Docker Git FastAPI Pandas postgresql linux Pycharm Jenkins jira aws

5 days ago

Senior Manager - Digital Design development / Verification

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

5-10 years

LINT cdc high-speed interfaces CPU & IP integration processors RISC-V multiple clock domains power and clock management designs Rtl Design Synthesis BT formal verification static/dynamic clock gating STA Timing Closure low power design methodologies detailed documentation asynchronous interfaces SDIO Design Reviews power gating i2s ARM processors peripheral interfaces dynamic voltage and frequency scaling design signoff flows Mobile DDR Quad/Octa-SPI 15.4 WiFi cross-functional dependencies Pcie Verilog wireless protocols I2c System Verilog Usb Pwm Uart Can Constraints System Architecture Ethernet Ble

11 days ago

Lead Software Engineer

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

0-2 years

arm architecture TCP/IP Networking 802.11 Technologies Rtos C Programming Software Lifecycle

12 days ago

Engineering Manager - Full stack development(Proficient in Python)

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

2-8 years

vs code Confluence python Nginx Reactjs Docker Git Pandas FastAPI postgresql linux Pycharm Jenkins jira aws

7 days ago

Engineer I-CAD

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

3-5 years

Mentor Calibre IBM LSF Subversion Digital RTL flexlm Cliosoft SOS Gds Methodics IPLM Cadence Virtuoso Perforce Jira Confluence Perl Analog Shell scripting Python Tcl

12 days ago

Lead Engineer - RTL Design

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

7-10 years

high-speed low-power digital circuit design techniques microprocessor architecture Simulation verification techniques digital circuit design verilogams RTL Coding high-performance digital circuit design techniques Timing Analysis wireless digital communications systems Logic Synthesis systemverilog Placement Vlsi behavioral modeling wired Clock Tree Synthesis Dsp C++ Scripting Languages matlab python C Verilog

18 days ago

Staff Software Engineer

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

8-12 years

encryption methods IEEE 802.11 Standards Wi-Fi Documentation hardware interfaces Cross-Platform Development Collaboration Security Protocols performance optimization C/C++ wireless protocols Operating Systems Networking Protocols Debugging

18 days ago

Lead Engineer - GLS Verification

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

6-8 years

ASIC Gate-Level Simulation RTL CPF Uvm UPF systemverilog Fpga Perl Python

16 days ago

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Silicon labs Jobs & Career

Engineering Manager - Full Stack Development (Proficient in Python)

Senior Manager - Digital Design development / Verification

Lead Software Engineer

Engineering Manager - Full stack development(Proficient in Python)

Engineer I-CAD

Lead Engineer - RTL Design

Staff Software Engineer

Lead Engineer - GLS Verification