144

Rtl Verification Jobs

Lead Engineer - RTL Design

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

7-10 years

high-speed low-power digital circuit design techniques microprocessor architecture Simulation verification techniques digital circuit design verilogams RTL Coding high-performance digital circuit design techniques Timing Analysis wireless digital communications systems Logic Synthesis systemverilog Placement Vlsi behavioral modeling wired Clock Tree Synthesis Dsp C++ Scripting Languages matlab python C Verilog

18 days ago

ASIC Design Engineer

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

8-10 years

logic analyzers Memory Controller lpddr Digital Design lab tools Rtl Design high speed scope compliance packages Verification memory technologies Embedded Communication Skills phys ddr5 ddr4 jedec fusa icmanage systemverilog Git Version Control Systems perforce C Verilog

17 days ago

GFX- IP Verification Lead

Permanent Job

Bengaluru / Bangalore ,

India

12-14 years

Asic verification Analytical Thinking Coverage Emulation test creation Interpersonal Skills RTL code Simulation Problem-solving Teamwork ASIC Design C/C++ programming assertion Graphics pipeline triage Windows Linux Verilog Test Plan System Verilog

17 days ago

VLSI Manager/Director - India

Permanent Job

Pune ,

India

15-17 years

LINT cdc Reusable Testbench Architecture RTL modular Third Party IP Uvm Security Controllers video standards Synthesis ASIC SERDES C/C++ PHY LEC Verification Switching Digital Signal Processing Filters EDA Tools Processors dpi Networking Pcie Verilog Tcp/ip Static Timing Analysis System Verilog Python Automation Mac Ethernet Tcl Systemc

17 days ago

NoC Systems Engineer

Permanent Job

Bengaluru / Bangalore ,

India

7-12 years

Synthesis Digital Design LINT RTL ARMv8 cdc Leadership Synopsys design complier micro-architecture DC/DCG synthesis communication ARMv9 coherency protocols formal verification Timing Closure Verification Dft silicon debug PLDRC Soc Clp Noc virtualization multi-core

19 days ago

GFX- IP Verification Lead

Permanent Job

India

12-14 years

Asic verification triage assertion Teamwork Emulation ASIC Design Analytical Thinking Interpersonal Skills test creation Problem-solving C/C++ programming Graphics pipeline RTL code Simulation Coverage Test Plan Windows Linux Verilog System Verilog

20 days ago

SMTS Silicon Design Engineer

Permanent Job

India

0-2 years

Design for Test IEEE1500 Scan Synopsys Tetramax/DFTMAX Perl/Shell scripting Verilog RTL design DFT verification JTAG 1149.x Mentor testkompress memory BIST VCS simulation tool

18 days ago

Senior IP Application Engineer

Permanent Job

Bengaluru / Bangalore ,

India

3-6 years

Synthesis Design Verification API-C RTL UCIe Verification front-end design formal verification ASIC HBM hardware debug DPI-C CXL mixed signal circuit design static timing analysis Silicon Validation DDR Pcie Ethernet Firmware

27 days ago

Emulation Engineer

Permanent Job

Bengaluru / Bangalore ,

India

4-10 years

PCIe Gen4/5 5G/10G performance analyzers RTL Virtual Bridges Arm CPU cores emulation servers emulation model builds Synopsys ZeBu Mentor Graphics emulation platforms sub-systems Cadence Palladium Synthesis XTOR Integration test automation frameworks Implementation Ip SoCs resources Display Port verification plans USB2.0 Ethernet 1G/2 usb3.0 emulation environments digital systems Speedbridges hardware description languages HDMI protocol knowledge Fpga Debuggers Spi Jtag Verilog Computer Architecture Debugging Software Tools I2c Clusters System Verilog Uart

26 days ago

NoC Systems Staff Engineer

Permanent Job

Bengaluru / Bangalore ,

India

7-12 years

LINT cdc ARMv8 Synopsys design complier RTL DC/DCG synthesis Synthesis Dft formal verification Leadership Verification micro-architecture communication silicon debug PLDRC coherency protocols Timing Closure ARMv9 Digital Design Noc multi-core Soc Clp virtualization

24 days ago

Design Verification Engineer

Permanent Job

Noida ,

India

2-4 years

SI/PI Simulation Uvm systemverilog ASIC RTL synthesis HIP/SIP integration silicon bring-up Verification CXL Soc Pcie

a month ago

GLS Verification Engineer

Permanent Job

Hyderabad / Secunderabad, Telangana

6-15 years

Confidential

Rtl Design GLS Verification Verification

a month ago

ASIC Physical Design, Staff Engineer

Permanent Job

Noida ,

India

5-7 years

Sta CTS Design Compiler Fusion Compiler RTL Synthesis formal verification Gds Placement IP Subsystem implementation IC Compiler/2 CAD automation methods physical implementation Floor-Planning synopsys tools industry tools IC design Formality Hercules/ICV Physical Verification FE flows Power Planning primetime Star-RCXT EMIR Signoff Python Routing Perl Tcl

a month ago

Camera IP Verification Sr Lead Engineer

Permanent Job

Bengaluru / Bangalore ,

India

2-4 years

systemverilog dpi Uvm AHB RTL Axi camera verification Simulation Arm Python Perl

a month ago

Senior Physical Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

0-2 years

Circuit Design Physical Verification Physical Design Analytical Problem-solving Rtl Design Logic Design

a month ago

Member of Consulting Staff

Permanent Job

Noida ,

India

0-2 years

ASIC Synthesis Dc RTL SV Fusion compiler Verification digital logic Gate sign off tools VHDL Zebu RTL Architect Prime time joules Gds Prime Power Low Power SOC Verilog Tcl Python Perl

30 days ago

Lead Product Validation Engineer

Permanent Job

Noida ,

India

7-12 years

ASIC Synthesis Dc Simulation SV Fusion compiler Place & Route Verification digital logic Low Power SOC design principles Gate sign off tools VHDL Zebu RTL to GDS flow RTL Architect Prime time joules Prime Power Verilog Tcl Python Debugging Perl

a month ago

STA Engineer

Permanent Job

Hyderabad / Secunderabad, Telangana ,

Bengaluru / Bangalore ,

Noida ,

Pune ,

India

5-7 years

Sta methodology development Timing Analysis RTL timing optimization Physical Design resistance effects Dft Timing Constraints Timing Closure Verification timing margins Clock Tree Synthesis parasitic capacitance

a month ago

Wifi MAC -Design Engineer -Sr Lead

Permanent Job

Bengaluru / Bangalore ,

India

1-3 years

Digital ASIC Synthesis Conformal Low Power UPF stdcell libraries process technology RTL PTPX SAIF Computer Arithmetic primetime multibit mapping datapath design Conformal ECO MCMM Circuit Design formal verification Pd memories Processor Design Microarchitecture power intent Dft

a month ago

CPU Verification Manager/Lead

Permanent Job

India

10-12 years

Asic Design Verification OVM/UVM methodology Digital Design ML/AI OOPs concepts C++ Micro-Architecture ARM Computer Architecture Rtl Design Processor subsystems X86

a month ago

PD Engineer

Permanent Job

India

3-7 years

Asic Physical Design Synthesis Synopsys RTL Mentor Graphics Layout Design Optimization Physical Verification Parasitic Extraction Cadence Sign Off GDSII Placement Clock Tree Synthesis IR drop analysis CAD Tools perl Static Timing Analysis Tcl Routing

a month ago

EMIR, IR DROP PD Engineer

Permanent Job

India

0-2 years

Asic Physical Design Synopsys Mentor Graphics RTL Synthesis Optimization Physical Verification Parasitic Extraction Cadence Sign Off Placement Clock Tree Synthesis IR drop analysis CAD Tools Static Timing Analysis Routing

a month ago

MTS Silicon Design Engineer

Permanent Job

India

7-9 years

RTL Synthesis IP integration Timing Analysis EM Dual Patterning Ir analytical establishing design methodology primetime circuit/logic simulation Placement DRC Design Compiler Power-plan LVS Cadence Genus computer organization tools for logic synthesis Layout Physical Verification CTS ICC2 clock and power gating techniques Synopsys Fusion Compiler Timing Closure Apache Redhawk FinFET Attention To Details scan stitching Place And Route floorplanning Schematics Problem Solving design optimization logic equivalence GDS2 architecture Extraction physical/timing/electrical quality Formal Equivalence final signoff Innovus PNR tools Mentor Graphics Calibre Crosstalk Analysis Floor-plan Physical Implementation Clock Tree Synthesis StarRC Routing

a month ago

Senior Physical Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

0-2 years

Circuit Design Physical Verification Physical Design Analytical Problem-solving Rtl Design Logic Design

a month ago

Pre - Silicon Validation

Permanent Job

Remote ,

India

8-12 years

CPU Verification processor Memory analytical validation content Uvm Graphics Video RTL validation Design system simulation models architecture validation platforms staging Audio verification test plans validation coverage display Ip Problem Solving test bench infrastructure AMBA Axi feature scoping Pre-Si validation AHB C Ovm Debugging System Verilog C++ Soc Pci

5 months ago

Home

rtl verification Jobs

Top Industry

Job Category

Rtl Verification Jobs

Lead Engineer - RTL Design

ASIC Design Engineer

GFX- IP Verification Lead

VLSI Manager/Director - India

NoC Systems Engineer

GFX- IP Verification Lead

SMTS Silicon Design Engineer

Senior IP Application Engineer

Emulation Engineer

NoC Systems Staff Engineer

Design Verification Engineer

GLS Verification Engineer

ASIC Physical Design, Staff Engineer

Camera IP Verification Sr Lead Engineer

Senior Physical Design Engineer

Member of Consulting Staff

Lead Product Validation Engineer

STA Engineer

Wifi MAC -Design Engineer -Sr Lead

CPU Verification Manager/Lead

PD Engineer

EMIR, IR DROP PD Engineer

MTS Silicon Design Engineer

Senior Physical Design Engineer

Pre - Silicon Validation