RTL Design Micro-Architect Lead

Mirafra is hiring RTL Design Micro-Architect Lead

Position: RTL Design Micro-Architect Lead

Location: Bengaluru

Experience Level: 7-15 years

Responsibilities:

• Should have experience with ASIC microarchitecture development.
• Expertise and hand on experience in Verilog/RTL design for IP/Sub-System soc.
• Command and thorough knowledge on digital logic design concepts.
• Should good knowledge on Lint, CDC, RDC, Constraint development, Synthesis.
• Must have worked on at least one large IP/Sub-System block and have in depth Knowledge of IP block design/architecture.
• Must have experience in Synopsys/Cadence/Mentor Simulation tools and debugging skills.
• Desirable Perl/TCL scripting and automation knowledge.
• Desirable experience in RTL logic synthesis, sdc and constraint writing experience.
• Understanding of basic soc architecture std-cells, IO blocks ect.

Please share you resume to [Confidential Information]

Best Regards,

Puja Saha

Talent Acquisition - Hardware Engineering

Mirafra Software Technologies Pvt Ltd. Akshay Tech Park, Whitefield, Bangalore 560066. India.

Email: [HIDDEN TEXT] |Cell #: +91 8637807369 |

** Mirafra has been awarded as the Best company to work for 2016 and Most Promising Design Services Provider - 2018 by SiliconIndia **