Work From Home Static Timing Analysis Jobs

Principal Digital Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

5-12 years

LINT systemverilog Design Verification cdc Logic Synthesis processor Stream protocols AHB formal equivalence APB Dft Axi power analysis Verilog Static timing analysis Dsp Soc Architecture

2 days ago

Principal Digital Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

5-12 years

LINT systemverilog Design Verification cdc Logic Synthesis processor Stream protocols AHB formal equivalence APB Dft Axi power analysis Verilog Static timing analysis Dsp Soc Architecture

9 days ago

VLSI Manager/Director - India

Permanent Job

Pune ,

India

15-17 years

LINT cdc Reusable Testbench Architecture RTL modular Third Party IP Uvm Security Controllers video standards Synthesis ASIC SERDES C/C++ PHY LEC Verification Switching Digital Signal Processing Filters EDA Tools Processors dpi Networking Pcie Verilog Tcp/ip Static Timing Analysis System Verilog Python Automation Mac Ethernet Tcl Systemc

17 days ago

FPGA Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

4-9 years

error correction codes Design Reviews logic synthesis tools verification methodologies DCT/IDCT Intel Quartus Simulation Xilinx Vivado FFT/IFFT VHDL FIR/IIR filters Modelsim Hardware Testing modulation schemes Dsp static timing analysis Debugging

4 months ago

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Work From Home Static Timing Analysis Jobs

Principal Digital Design Engineer

Principal Digital Design Engineer

VLSI Manager/Director - India

FPGA Design Engineer