Work From Home Asic Physical Design Jobs in Pune

Layout Design, Staff Engineer

Permanent Job

Bengaluru / Bangalore ,

India

6-8 years

LPE layout automation top level verification flow Dfm written communication skills CMOS latchup layout design high-speed digital layout bondpad layout Scripting skills Esd IO frame Place & Route IR considerations digital flow IO abutment rules process technology LEF generation ASIC physical design flow EM DRC/LVS layout co-ordination activities pitch requirements Analog Mixed-signal DDR/HBM IP layout power rail routings Remote site interaction Advanced floorplanning techniques Deep submicron effects Advanced tool usage Verbal Communication Skills FinFET layouts Technical Leadership

4 months ago

Layout Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

2-10 years

Analog Mixed-signal layout IO abutment rules IR considerations top level verification flow Place & Route EM DDR IOs customers CMOS power rail routings bondpad layout DRC/LVS coordination activities mitigation Process Verification development teams floorplanning techniques ASIC physical design flow FinFET layouts Dfm Remote site interaction written communication skills Digital IO frame layout automation LPE Deep submicron effects LEF generation Esd Scripting skills pitch requirements Verbal Communication Skills Technical Leadership

5 months ago

Hardware Engineering Intern, Winter 2025 (English)

Permanent Job

Bengaluru / Bangalore ,

India

0-2 years

Hardware System Verilog coding design concepts Verilog/HDL EDA Tools Design Verification computer hardware architecture SoC/ASIC Design Physical Design Design For Testability Methodology Electrical Engineering low power reduction techniques Scripting Languages

a month ago

Hardware Engineering Intern, Winter 2025 (English)

Permanent Job

Bengaluru / Bangalore ,

India

0-2 years

a month ago

Lead Product Engineer STA

Permanent Job

Bengaluru / Bangalore ,

India

0-2 years

Persistence System level Validation Discipline Power Planning Graphics SOC experience ASIC Bus planning EDA Tools POCV noise glitch prime time crosstalk delay calibre self-initiative Customer Orientation Floor Planning SD Resources Timing Constraints PNR Physical Design IR-STA Timing Closure custom IC designs Synopsys ICC2 Fpga Cpu Quality Scripting Languages

4 months ago

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Work From Home Asic Physical Design Jobs in Pune

Layout Design, Staff Engineer

Layout Design Engineer

Hardware Engineering Intern, Winter 2025 (English)

Hardware Engineering Intern, Winter 2025 (English)

Lead Product Engineer STA