Uvm Jobs in Pune

IP Verification Manager

Permanent Job

Pune ,

India

10-12 years

TCSH VHDL Uvm systemverilog PERL Verilog Bash PYTHON Tcl

4 days ago

VLSI Engineer

Permanent Job

Pune ,

India

0-2 years

rtl verification HVL Uvm System Verilog Ovm Hdl

4 days ago

Principal Design Engineer

Permanent Job

Pune ,

India

8-10 years

Design Verification Uvm Gate Level Simulations formal verification NoCs Testbenches Interconnects System Verilog Scripting Languages Programming Languages

12 days ago

LINT cdc Reusable Testbench Architecture RTL modular Third Party IP Uvm Security Controllers video standards Synthesis ASIC SERDES C/C++ PHY LEC Verification Switching Digital Signal Processing Filters EDA Tools Processors dpi Networking Pcie Verilog Tcp/ip Static Timing Analysis System Verilog Python Automation Mac Ethernet Tcl Systemc

17 days ago

Principal Design Engineer

Permanent Job

Pune ,

India

8-10 years

Uvm SV spec TLM STREAM C++ Verilog Systemc Python Qos Matplotlib Pandas

18 days ago

Pre - Silicon Validation

Permanent Job

Remote ,

India

8-12 years

CPU Verification processor Memory analytical validation content Uvm Graphics Video RTL validation Design system simulation models architecture validation platforms staging Audio verification test plans validation coverage display Ip Problem Solving test bench infrastructure AMBA Axi feature scoping Pre-Si validation AHB C Ovm Debugging System Verilog C++ Soc Pci

5 months ago

Digital Verification ASIC Engineer

Permanent Job

Delhi ,

Hyderabad / Secunderabad, Telangana ,

Bengaluru / Bangalore ,

Chennai ,

Kolkata ,

Mumbai ,

Pune ,

India

7-9 years

Asic verification design for re-use of pre and post silicon tests and infrastructure Uvm Ethernet MAC Security EDA Tools protocols C/C++ PHY Switching video standards modular and reusable testbench architecture automation of testbench creation tests digital signal processing filters third party IP Regression Processing dpi Pcie Verilog Tcp/ip System Verilog Python Tcl Systemc

5 months ago

Staff Engineer I - VLSI

Permanent Job

Bengaluru / Bangalore ,

Pune ,

India

7-9 years

AMBA HBM CXL Uvm Pcie Perl Verilog Ovm System Verilog Python

3 months ago

Eval Platform Tools and Infrastructure

Permanent Job

Delhi ,

Hyderabad / Secunderabad, Telangana ,

Bengaluru / Bangalore ,

Chennai ,

Kolkata ,

Mumbai ,

Pune ,

India

3-7 years

Uvm TLM C/C++ Spi Linux Verilog Ethernet I2c Arm Python System Verilog Systemc

3 months ago

Staff Engineer I - VLSI

Permanent Job

Bengaluru / Bangalore ,

Pune ,

India

7-9 years

AMBA HBM CXL Uvm Pcie Perl Verilog Ovm System Verilog Python

5 months ago

Design Verification Engineer

Permanent Job

Ahmedabad ,

Pune

4-8 years

SOC/IP Verification System Verilog/UVM RTL

5 months ago

Sr. Engineer

Permanent Job

Pune ,

India

0-2 years

Mixed Signal DSP Basics SV receivers SERDES bandgap test benches Simulation analog circuit designs transmitter Uvm Pll op-amp Verification 100G+ Test Plans Analog Shell Perl Python

5 months ago

Staff Engineer, ASIC Verification

Permanent Job

Pune ,

India

5-7 years

OVM/UVM VMM CXL CPRI JESD Pcie Perl Ethernet System Verilog Python

5 months ago

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Uvm Jobs in Pune

IP Verification Manager

VLSI Engineer

Principal Design Engineer

VLSI Manager/Director - India

Principal Design Engineer

Pre - Silicon Validation

Digital Verification ASIC Engineer

Staff Engineer I - VLSI

Eval Platform Tools and Infrastructure

Staff Engineer I - VLSI

Design Verification Engineer

Sr. Engineer

Staff Engineer, ASIC Verification