Unified Power Format Jobs

Senior Design Verification Engineer

Permanent Job

Bengaluru / Bangalore ,

India

5-7 years

unified power format PLLs secured boot schemes tape-outs Standard Delay Format Uvm UPF USB2.0 PG netlist regression closure Universal Verification Methodology SDIO Uart Soc Spi Perl SDF I2c Arm Python

3 months ago

Synthesis Professionals

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

0-2 years

Sta Cadence LEC RTL to GDS flow synthesis timing closure RTL HDL languages UPF ECO flows TCL language unified power format Dft formal verification VHD Pd Low power flows Cadence Synthesis tool Synopsys Spyglass Lint CDC checks prime time Clp Perl Verilog

5 months ago

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Unified Power Format Jobs

Senior Design Verification Engineer

Synthesis Professionals