Timing Concepts Jobs

SOC Physical Design Engineer Lead/Manager

Permanent Job

Bengaluru / Bangalore ,

India

8-12 years

Power Planning Vlsi semiconductor devices process technology Fabrication Timing Concepts Physical Design Placement Floor Planning BE design Digital Electronics Layout closure Clock Tree Synthesis Circuits Routing

5 days ago

Application Engineer

Permanent Job

Bengaluru / Bangalore ,

India

0-2 years

Dc cts ICC2 Low power concepts Timing Concepts Synthesis Scripting knowledge genus DCT Floor Planning Placement Physical design flow routing Perl Linux Environment Tcl

2 hours ago

SOC RTL Design-Sr Lead

Permanent Job

Noida ,

India

1-3 years

SoC clocking debug architecture Timing Concepts Asynchronous interface Synthesis SDCC DesignCompiler RTL Coding Genus micro-architecture Low power SoC design FusionCompiler System-Verilog Synthesis SOC design constraint development reset Timing Analysis AMBA protocols primetime Timing Closure Multi Clock designs Verilog Usb Logic Design Peripherals Pcie

5 months ago

Intern - VLSI DI

Permanent Job

Pune ,

India

0-2 years

Physical design implementation setup time Circuit Design Timing Concepts Analog Circuit Design Equivalence check EDA Tools Power CMOS fabrication process Frequency of circuit operations power dissipation ASIC design flow calculations of maximum load on circuit performance hold time requirements effect of transition Layout Design Timing Analysis Place And Route Shell Scripting Languages Logic Design Perl Tcl

5 months ago

Emulation/Post-Si Validation Engineer

Permanent Job

Bengaluru / Bangalore ,

India

5-8 years

Digital memories Palladium Timing Concepts Rtl Design SoC Architectures high speed serial interfaces ZEBU Emulation models development Veloce Emulation Platforms Networking domain knowledge intel architecture Shell scripting

5 months ago

Video Design Verification Staff Engineer

Permanent Job

Bengaluru / Bangalore ,

India

2-4 years

low power design LINT cdc ASIL Timing Concepts Proactive Hardware Architecture Synthesis ASIC development flow Verification Multimedia Domain Validation Motivated Curious constraint development Collaborative silicon debug Ai Functional Safety AMBA protocols Asynchronous interfaces Creative Axi Functional ECOs APB Written Communication Timing Closure Oral Communication AHB Multi Clock designs Clp Video Codecs Ml Computer Vision

5 months ago

SoC Design Engg - Emulation

Permanent Job

Bengaluru / Bangalore ,

India

6-10 years

pre-silicon validation Timing Concepts UCIe Problem-solving Rtl Design SoC Architectures high speed serial interfaces Zebu emulation model CXL emulation domain networking domain knowledge caching/memories coherency Perl Pcie intel architecture Debugging Scripting Languages Python

5 months ago

Lead RTL(ASIC) Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

7-12 years

LINT cdc ip design Synthesis Axi ASIC SoC Clocking/Reset Architecture Timing Concepts APB AMBA Protocols AHB Rtl Design Logic Design

5 months ago

Senior Staff Engineer - Product Validation Engineer - STA Primetime

Permanent Job

Bengaluru / Bangalore ,

India

6-8 years

SDC constraints PBA timing Timing Analysis synopsys primetime distributed ECO flows derates Extraction advanced OCV concepts physical design closure Power hierarchical STA flows Perl Static Timing Analysis Python Tcl

a day ago

Senior Staff Engineer - Product Validation Engineer - STA Primetime

Permanent Job

Bengaluru / Bangalore ,

India

6-8 years

a day ago

Senior Staff Engineer - Product Validation Engineer - STA Primetime

Permanent Job

Bengaluru / Bangalore ,

India

6-8 years

a day ago

Dietitian

Permanent Job

Mumbai ,

India

1-3 years

food frequency questionnaires Nutritionist nutrition science Medical Nutrition Therapy food preparation methods Interpersonal Skills nutrition concepts portion control behavioral counseling public health outcomes dietary guidelines Patience communication dietary recall Empathy Dietetics Food Science scientific research Nutrition food composition nutrition principles healthcare teams body composition analysis non-judgmental attitude meal timing

10 days ago

Group SDE II

Permanent Job

Dubai ,

India

3-7 years

FCCS Oracle EPM Cloud suite Tax provisioning ports oral communication skills Attention To Detail CBCR issue-resolution deadline-driven work environment Problem Solving different tax rules Multitask Tax automation timing differences ownership BPC concepts concept of consolidation written communication skills Effective Tax rate TRCS OECD Pillar Technical elimination Logistics Consolidation reconciliation configuration Fdmee Data Management Functional

12 days ago

Test & Validation Lead Engineer

Permanent Job

Bengaluru / Bangalore ,

India

6-8 years

9 days ago

Senior Staff Engineer - Test & Validation Engineer - STA Primetime

Permanent Job

Bengaluru / Bangalore ,

India

6-8 years

physical design closure Timing Analysis SDC constraints hierarchical STA flows ECO flows derates PBA timing synopsys primetime distributed Extraction advanced OCV concepts Power Static Timing Analysis Tcl Python Perl

8 days ago

Senior Staff Engineer / Staff Engineer

Permanent Job

Bengaluru / Bangalore ,

India

8-10 years

multidimensional designs professional concepts Methods experimental tests evaluation criteria ASIC operation data judgment layout of complex integrated circuits key contacts Results Synthesis Architecture Design system simulation power use complex issues Timing Equipment ASIC development Place And Route Team Lead company objectives techniques post-graduate coursework Personnel Layout Design vendor capability Logic Design

17 days ago

Senior Staff Engineer / Staff Engineer

Permanent Job

Bengaluru / Bangalore ,

India

8-10 years

17 days ago

ASIC Physical Design, Staff Engineer

Permanent Job

Bengaluru / Bangalore ,

India

4-6 years

Sta CMOS logic design CTS liberty low power concepts Cadence Mentor UPF/CPF formats Physical Verification Synthesis Gds Floor Planning ASIC design flow synopsys tools power analysis Def Asic Physical Design Technology files Power Planning Lef Design Closure Timing Analysis standard cells view generation processes Timing ECO Flow Place And Route

16 days ago

Staff/Sr Staff STA Engineer

Permanent Job

Bengaluru / Bangalore ,

India

5-8 years

Sta Full flow Implementation tools Verilog/SV Fusion Compiler Digital Design methodologies Simulation RTL static timing analysis concepts UPF primetime spyglass Synthesis RTL Coding CAD automation methods Synopsys Design Compile GDSII Perl Python Tcl

a month ago

Dietitian

Permanent Job

Mumbai ,

India

1-3 years

food frequency questionnaires Nutritionist nutrient requirements medical history Medical Nutrition Therapy nutrition science food preparation methods Interpersonal Skills nutrition concepts portion control behavioral counseling public health outcomes Patience communication health goals dietary recall Empathy Dietetics Food Science scientific research Nutrition chronic diseases body composition analysis balanced meal plans meal timing Health Promotion

a month ago

Sr. Silicon Design Engineer

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

7-9 years

digital design concepts SOC integration reset data/control fabrics LINT LEC Timing Analysis systemverilog cdc NOC concepts Vdhl ASIC frontend methodologies Quality Checks RDC AMBA protocols clocking Verilog

a month ago

Physical Design Engineer (3yrs-12yrs - Bangalore)

Permanent Job

Bengaluru / Bangalore ,

India

3-12 years

SoC Implementation Fullchip Designs Cadence Toolset Communication Skill Timing Analysis Concepts Team Player Debug Advanced Technology Nodes Synopsys Scripting Languages Shell Perl Tcl

a month ago

Sr. Principal Digital Design Lead

Permanent Job

Bengaluru / Bangalore ,

India

15-17 years

ASIC Synthesis M55 heterogenous processor cores low power design processor A55 GIC Coresight Debug Design for Test interconnect fabric RISC-V TZC DSP fundamentals AHB U55 MMU formal equivalence APB Axi LINT RTL DSP core M4 SMPU System-Verilog cdc caches Stream protocols DMA trace SPU Timing Closure low power design DFT concepts silicon debug power analysis Soc Architecture Verilog Soc

a month ago

ASIC Physical Design Engr

Permanent Job

Bengaluru / Bangalore ,

India

2-3 years

Dc Fusion Compiler Pt def Cadence soce innovus Place & Route lef CMOS ASIC ASIC flow Tech file liberty ICC-II Low power concepts ICC standard cells view generation process Physical Verification genus Physical Design submicron process nodes Gds UPF/CPF format Synopsys Timing Analysis Rc

5 months ago

IPPD - Physical design Staff Engineer

Permanent Job

Bengaluru / Bangalore ,

India

2-4 years

CTS Electronics Engineering PD implementation Cadence Innovus Physical Implementation Physical Verification PDN Floor-planning clocking architecture power optimization Computer Science Timing Closure Low Power verification PPA critical cores STA concepts Place And Route Synopsys ICC2 formal verification Fpga Perl Scripting Python Dsp hardware engineering Tcl

4 months ago

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Timing Concepts Jobs

SOC Physical Design Engineer Lead/Manager

Application Engineer

SOC RTL Design-Sr Lead

Intern - VLSI DI

Emulation/Post-Si Validation Engineer

Video Design Verification Staff Engineer

SoC Design Engg - Emulation

Lead RTL(ASIC) Design Engineer

Senior Staff Engineer - Product Validation Engineer - STA Primetime

Senior Staff Engineer - Product Validation Engineer - STA Primetime

Senior Staff Engineer - Product Validation Engineer - STA Primetime

Dietitian

Group SDE II

Test & Validation Lead Engineer

Senior Staff Engineer - Test & Validation Engineer - STA Primetime

Senior Staff Engineer / Staff Engineer

Senior Staff Engineer / Staff Engineer

ASIC Physical Design, Staff Engineer

Staff/Sr Staff STA Engineer

Dietitian

Sr. Silicon Design Engineer

Physical Design Engineer (3yrs-12yrs - Bangalore)

Sr. Principal Digital Design Lead

ASIC Physical Design Engr

IPPD - Physical design Staff Engineer