283

Synthesis Jobs in Bengaluru Bangalore

Wireless HW Design Engineer-Sr

Permanent Job

Bengaluru / Bangalore ,

India

2-6 years

Electrical/Electronics Synthesis Circuit Design Computer Science formal verification process technology Computer Arithmetic Microarchitecture Hardware

21 days ago

Senior Staff Engineer / Staff Engineer

Permanent Job

Bengaluru / Bangalore ,

India

8-10 years

multidimensional designs professional concepts Methods experimental tests evaluation criteria ASIC operation data judgment layout of complex integrated circuits key contacts Results Synthesis Architecture Design system simulation power use complex issues Timing Equipment ASIC development Place And Route Team Lead company objectives techniques post-graduate coursework Personnel Layout Design vendor capability Logic Design

21 days ago

Silicon AI/ML Lead Architect, Google Cloud

Permanent Job

Bengaluru / Bangalore ,

India

5-10 years

ASIC RTL Internet Protocols systemverilog Go Ai Logic Synthesis high performance design Timing Closure low power design Soc C++ Python

16 days ago

Senior Staff Engineer / Staff Engineer

Permanent Job

Bengaluru / Bangalore ,

India

8-10 years

21 days ago

R&D Engineer IC Design

Permanent Job

Bengaluru / Bangalore ,

India

3-8 years

functional breadth major projects escalation point Strategic Methods experimental tests ASIC operation data Leadership Design Procedures Verification coaching Creativity Bachelors Delivery Synthesis innovative solutions Masters project management power use complex problems Timing Equipment Mentoring long-range goals Place And Route tactical Phd Layout ingenuity vendor capability specialization Theories Networking team leader

21 days ago

R&D Engineer IC Design

Permanent Job

Bengaluru / Bangalore ,

India

3-8 years

21 days ago

R&D Engineer IC Design

Permanent Job

Bengaluru / Bangalore ,

India

3-8 years

21 days ago

IC Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

Fresher

Sta congestion resolution floor-planning Tools LVS noise analysis ECO implementation Innovus formal verification Antenna dynamic environment equivalence checks global team communication Encounter power optimization caliber Learn adapt Methodologies Timing Analysis LEC ICC Problem Solving Physical Verification primetime SOC physical design ERC DRC Timing Closure partitioning Placement Crosstalk delay analysis Clock Tree Synthesis Route

21 days ago

MSIP Digital Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

2-3 years

RTL post-silicon bring-up Synthesis front-end flows Dft micro-architecture Fpga Dsp

19 days ago

IC Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

Fresher

21 days ago

ASIC Design Engineer Technical Leader

Permanent Job

Bengaluru / Bangalore ,

India

0-2 years

front-end ASIC design Timing Analysis ASIC Synthesis power analysis Makefiles scripting system-wide issues Verilog Debugging Networking Protocols Ethernet Python Perl Fc

20 days ago

IC Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

Fresher

21 days ago

Technical Leader

Permanent Job

Bengaluru / Bangalore ,

India

0-2 years

Timing Closure Synthesis SoC Encounter tapeout ICC physical verification closure Team Spirit analytical Formal Debug Tcl Perl

15 days ago

Staff Engineer, ASIC Development Engineering (Physical Design)

Permanent Job

Bengaluru / Bangalore ,

India

5-7 years

Synthesis DFT Compiler low power design System Verilog RTL Conformal RTL Compiler Sta Verilog Tcl Shell Scripting PERL

15 days ago

Sr Principal Digital Engineer

Permanent Job

Bengaluru / Bangalore ,

India

12-14 years

RTL Linting Synthesis cdc Dft Dsp

15 days ago

Principal Engineer, ASIC Development Engineering (Physical Design)

Permanent Job

Bengaluru / Bangalore ,

India

12-14 years

Physical Design Implementation fast-paced EDA Tools problem-solving skills Placement floorplanning physical design flows power optimization techniques advanced process nodes communication Signal Integrity design teams dynamic environment Multiple Projects Timing Closure Leadership Skills Clock Tree Synthesis Static Timing Analysis routing

15 days ago

Silicon AI/ML Lead Architect, Google Cloud

Permanent Job

Bengaluru / Bangalore ,

India

5-10 years

ASIC RTL Internet Protocols systemverilog Go Ai Logic Synthesis high performance design Timing Closure low power design Soc C++ Python

15 days ago

Silicon SoC RTL Design/Integration Engineer, Google Cloud

Permanent Job

Bengaluru / Bangalore ,

India

1-3 years

ASIC development Synthesis Processor design Timing/power analysis Arithmetic units systemverilog Design for Testing (DFT Queueing High performance design techniques Accelerators Bus architectures Scheduling Low power design techniques Buffering Asic Design Verification Integration flows VHDL Chisel SoC designs Memory hierarchies Verilog Networking Ethernet Perl Tcp/ip Scripting Languages Python

16 days ago

Physical Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

6-8 years

SOC physical design LEC ICC caliber Timing Analysis Physical Verification equivalence checks primetime Placement power optimization Encounter global team Problem Solving Crosstalk delay analysis congestion resolution noise analysis Innovus Communication Skill Sta floor-planning formal verification dynamic environment Timing Closure partitioning ECO implementation Clock Tree Synthesis Route

15 days ago

RTL Design Lead, Silicon

Permanent Job

Bengaluru / Bangalore ,

India

4-8 years

ASIC multi-generational roadmap Microarchitecture ARM-based SoCs Rtl Design low power estimation IP/SoC design ASIC methodology Synthesis Timing Closure interconnects Verilog System Verilog

20 days ago

Molecular Biologist

Permanent Job

Bengaluru / Bangalore ,

India

3-6 years

Pcr site-directed mutagenesis mammalian hosts Geneious recombinant protein expression vector nti Molecular Biology RNA gene synthesis CHO V-gene analysis cDNA synthesis antibody discovery process HEK293 Dna SEQ builder expression vectors QPCR

29 days ago

Staff RTL Desgin

Permanent Job

Bengaluru / Bangalore ,

India

8-10 years

physical implementation Power management techniques cdc e Verilog Hdl Timing Analysis Linting UCIe Uvm systemverilog Synthesis Dft RDC HBM X-Propagation LPDDR Ovm Soc Perl Pcie Ethernet Arm Python

27 days ago

Sr. Staff Digital Engineer, SoC Design

Permanent Job

Bengaluru / Bangalore ,

India

12-14 years

low power design LINT Sta power analysis Synthesis cdc CPU architecture Ace Axi Timing Constraints APB AHB SDIO Pcie

28 days ago

Sr. Staff Digital Engineer, SoC Design

Permanent Job

Bengaluru / Bangalore ,

India

12-14 years

low power design LINT Sta power analysis Synthesis cdc CPU architecture Ace Axi Timing Constraints APB AHB SDIO Pcie

27 days ago

NoC Systems Staff Engineer

Permanent Job

Bengaluru / Bangalore ,

India

7-12 years

LINT cdc ARMv8 Synopsys design complier RTL DC/DCG synthesis Synthesis Dft formal verification Leadership Verification micro-architecture communication silicon debug PLDRC coherency protocols Timing Closure ARMv9 Digital Design Noc multi-core Soc Clp virtualization

27 days ago

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Job Category

Top Searches

Synthesis Jobs in Bengaluru Bangalore

Wireless HW Design Engineer-Sr

Senior Staff Engineer / Staff Engineer

Silicon AI/ML Lead Architect, Google Cloud

Senior Staff Engineer / Staff Engineer

R&D Engineer IC Design

R&D Engineer IC Design

R&D Engineer IC Design

IC Design Engineer

MSIP Digital Design Engineer

IC Design Engineer

ASIC Design Engineer Technical Leader

IC Design Engineer

Technical Leader

Staff Engineer, ASIC Development Engineering (Physical Design)

Sr Principal Digital Engineer

Principal Engineer, ASIC Development Engineering (Physical Design)

Silicon AI/ML Lead Architect, Google Cloud

Silicon SoC RTL Design/Integration Engineer, Google Cloud

Physical Design Engineer

RTL Design Lead, Silicon

Molecular Biologist

Staff RTL Desgin

Sr. Staff Digital Engineer, SoC Design

Sr. Staff Digital Engineer, SoC Design

NoC Systems Staff Engineer