111

Static Timing Analysis Jobs

STA Engineers

Permanent Job

Noida ,

India

0-2 years

semiconductor design projects team environment EDA Tools Electrical Engineering Computer Science Analytical Skills Problem-solving Perl Static Timing Analysis Tcl

a month ago

MTS Silicon Design Engineer

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

8-10 years

ASIC LINT Floor Planning RTL cdc DisplayPort Pd Synthesis Timing Closure Axi Eco Usb Tcl Ethernet static timing analysis Python Pcie PERL

a month ago

SMTS Silicon Design Engineer

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

12-14 years

ASIC LINT UPF Floor Planning RTL cdc DisplayPort Pd Synthesis Timing Closure Axi Eco Usb Tcl Ethernet static timing analysis Python PERL Pcie

a month ago

Asic Physical Design Synthesis Synopsys RTL Mentor Graphics Layout Design Optimization Physical Verification Parasitic Extraction Cadence Sign Off GDSII Placement Clock Tree Synthesis IR drop analysis CAD Tools perl Static Timing Analysis Tcl Routing

a month ago

EMIR, IR DROP PD Engineer

Permanent Job

India

0-2 years

Asic Physical Design Synopsys Mentor Graphics RTL Synthesis Optimization Physical Verification Parasitic Extraction Cadence Sign Off Placement Clock Tree Synthesis IR drop analysis CAD Tools Static Timing Analysis Routing

a month ago

Senior Design Engineer- Physical Design

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

5-7 years

Cadence or Synopsys tools Asic Physical Design Full chip Physical Design Cadence Innovus ASIC fundamentals problem-solving skills 5nm node PERL Static Timing Analysis Tcl

a month ago

Senior Staff Engineer - STA

Permanent Job

Bengaluru / Bangalore ,

India

0-2 years

STA methodologies CPU implementation Tcl Scripting Python Scripting Static Timing Analysis

a month ago

Senior Physical Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

5-15 years

Sta CTS Chip finishing floorplanning Power Integrity Analysis PnR Suite Advanced Physical Verification Techniques Physical Verification Tcl/Tk/Perl Low Power Placement Netlist2GDSII Implementation SOC integration EM/IR-Drop analysis Power Grid Design high speed design Routing Static Timing Analysis

a month ago

HBM Verification Engineer

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

0-2 years

DC analysis Uvm latch based designs transistor level Gate level simulations MOS spice simulators transient analysis SDF back annotation static timing analysis Verilog System Verilog

a month ago

Senior IP Application Engineer

Permanent Job

Bengaluru / Bangalore ,

India

3-6 years

Synthesis Design Verification API-C RTL UCIe Verification front-end design formal verification ASIC HBM hardware debug DPI-C CXL mixed signal circuit design static timing analysis Silicon Validation DDR Pcie Ethernet Firmware

30 days ago

Principal Engineer, ASIC Development Engineering (Physical Design)

Permanent Job

Bengaluru / Bangalore ,

India

12-14 years

power optimization techniques floorplanning Multiple Projects fast-paced process nodes Signal Integrity Leadership Skills EDA Tools Timing Closure design teams Placement dynamic environment Physical Design Implementation problem-solving skills communication Clock Tree Synthesis routing Static Timing Analysis

a month ago

Standard Cell Characterization Engineer

Permanent Job

Bengaluru / Bangalore ,

India

0-2 years

Sta FinFET process technologies Simulators statistical characterization advanced MOSFET process Verification library benchmarking liberty syntax requirements standard cell circuits intel PDK"s power analysis tools CMOS Circuit Design UDFM Layout Design MOSFET device physics Verilog models Circuit Design perl static timing analysis Tcl python Shell Ccs

5 months ago

Senior STA Engineer

Permanent Job

Bengaluru / Bangalore ,

India

3-5 years

Sta power analysis static low power checks logic equivalency checks Timing Closure PTPX ECO flows static timing analysis

5 months ago

ASIC Physical Design, Staff Engineer

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

5-9 years

PTECO Timing Constraints Pt DMSA Physical Design static timing analysis automation Python Tcl

5 months ago

STA/Timing Sign-off Engineer - Sr Lead

Permanent Job

Noida ,

India

1-6 years

PD Implementation High frequency Datapath intensive Cores Electronics Engineering Power Estimation Computer Science Primetime/Tempus Rtl Design ASICs Synthesis Dft Physical Synthesis Power teams multi voltage design convergence Tcl/Perl scripting Constraint development Static Timing Analysis (STA) Clock Tree Synthesis hardware engineering

4 months ago

Circuit design Std cell & characterisation

Permanent Job

Bengaluru / Bangalore ,

India

0-2 years

Data Analysis Cadence transistor-level standard cell library design FinFET technology Problem-solving Layout Design Cadence Virtuoso Liberate/LV/Mx/Trio circuit-level simulations power analysis methodologies characterization Synopsys Circuit Design advanced process nodes Eda static timing analysis

3 months ago

Senior IP Application Engineer

Permanent Job

Bengaluru / Bangalore ,

India

3-6 years

Synthesis Design Verification UCIe front-end design formal verification API-C test cases HBM hardware debug CXL DPI-C functions mixed signal circuit design industry standard simulators static timing analysis Silicon Validation DDR Pcie Ethernet Firmware

4 months ago

Senior Engineer I - DFT

Permanent Job

Bengaluru / Bangalore ,

India

4-6 years

primetime high-speed NCSim Tessent MBIST RTL TetraMax DFT Compiler spyglass VHDL Tessent ATPG small-tech node design DesignCompiler SNPS SMS compilers TestKompress static timing analysis Vcs UNIX Jtag Perl Verilog Tcl

4 months ago

ASIC Physical Engineer Staff

Permanent Job

Bengaluru / Bangalore ,

India

8-10 years

Physical Synthesis Physical Verification RTL Cadence Mentor Design closure Place & Route Design planning ASIC SI prevention Physical Design Gds EDA Tools Power reduction Floor Planning Timing Constraints Synopsys Unix Static timing analysis Perl Tcl

4 months ago

STA/Synthesis Engineer

Permanent Job

Noida ,

India

3-5 years

Sta Logical aware Synthesis CTS constraint development RTL design team Sub system level Timing Closure PRO Clock gating checks Synthesis Logical Equivalence check DMSA flow Prelayout timing analysis UNIX env Placement final tapaout timing closure HMs team Block level Post layout timing analysis Manual ECO PD team Tcl Scripting Chip Level Static Timing Analysis

4 months ago

STA Engineer

Permanent Job

Bengaluru / Bangalore ,

India

3-5 years

Sta Logical aware Synthesis CTS RTL design team Timing Closure PRO Clock gating checks Synthesis Logical Equivalence check DMSA flow Prelayout timing analysis UNIX env Placement HMs team Post layout timing analysis PD team Tcl Scripting Static Timing Analysis

5 months ago

Physical Design Engineer

Permanent Job

Noida ,

India

1-2 years

PNR Multi-point CTS PnR tool knobs/recipes PPA optimization tackling high placement density/congestion bottlenecks floorplanning CTS Placement & Optimization Power Planning H-tree PG-Grid optimization custom clock tree Post route optimization Adaptive PDN spine Clock metrics optimization ECO implementation DRC closure Static timing analysis Tcl Routing Python Perl

4 months ago

Senior Engineer I - DFT

Permanent Job

Bengaluru / Bangalore ,

India

4-6 years

RTL high-speed design techniques ATPG DesignCompiler Tessent VHDL DFT Compiler primetime TetraMax TestKompress UNIX Tcl Jtag static timing analysis Perl

5 months ago

Engineer II - ASIC Design

Permanent Job

Bengaluru / Bangalore ,

India

4-6 years

4 months ago

ASIC Digital Design Engr, Sr I

Permanent Job

Bengaluru / Bangalore ,

India

10-12 years

Dc hardening Synthesis Dft Fusion Compiler Timing Closure Formality Prime Time UPF Static Timing Analysis

5 months ago

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static timing analysis Jobs

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Static Timing Analysis Jobs

STA Engineers

MTS Silicon Design Engineer

SMTS Silicon Design Engineer

PD Engineer

EMIR, IR DROP PD Engineer

Senior Design Engineer- Physical Design

Senior Staff Engineer - STA

Senior Physical Design Engineer

HBM Verification Engineer

Senior IP Application Engineer

Principal Engineer, ASIC Development Engineering (Physical Design)

Standard Cell Characterization Engineer

Senior STA Engineer

ASIC Physical Design, Staff Engineer

STA/Timing Sign-off Engineer - Sr Lead

Circuit design Std cell & characterisation

Senior IP Application Engineer

Senior Engineer I - DFT

ASIC Physical Engineer Staff

STA/Synthesis Engineer

STA Engineer

Physical Design Engineer

Senior Engineer I - DFT

Engineer II - ASIC Design

ASIC Digital Design Engr, Sr I