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409
Silicon Jobs in Delhi
Formal Verification (DV) - Silicon Design Engineer
Xilinx
Permanent Job
India
10-12 years
CPU verification
formal verification
SVA
IEV
IFV
VSI-FV
Verilog
Shell
System Verilog
perl
python
Jasper
8 days ago
CPU/IP SDE/MTS/SMTS Silicon Design Engineer
Xilinx
Permanent Job
India
10-12 years
Asic Design Verification
OVM/UVM methodology
Digital Design
ML/AI
OOPs concepts C++
Micro-Architecture
ARM Computer Architecture
Rtl Design
Processor subsystems
X86
8 days ago
MTS Silicon Design Engineer
Xilinx
Permanent Job
Hyderabad / Secunderabad, Telangana
,
India
Fresher
8 days ago
SMTS Silicon Design Engineer
Xilinx
Permanent Job
Hyderabad / Secunderabad, Telangana
,
India
0-2 years
ASIC
Uvm
TLM
C
Systemc
Windows
C++
Linux
Verilog
Makefile
Shell
Ruby
System Verilog
Perl
7 days ago
DV Manager Silicon Design Engineering
Xilinx
Permanent Job
Hyderabad / Secunderabad, Telangana
,
India
3-4 years
Processor based SoC Design Verification
AXI3
SV
Managerial Experience
Ace
Design Verification Stakeholders
Monitors
CXL
Checkers
Uvm
IP/SOC-Architects
BFM
cross geographic teams
MIPS
CHI
Next-Gen Server architecture
High-Speed Serials
Testbench
SOC Verif Env
SOC Integration
Usb
Arm Processor
Sata
Pcie
X86
10 days ago
MTS Silicon Design Engineer
Xilinx
Permanent Job
India
6-10 years
reset
LINT
UPF
cdc
micro-architecture
VHDL
SOC design
AHB
Video
padring
pinmuxing
low power design
architecture
Axi
Verilog
clocking
Noc
Pcie
Integration
10 days ago
SMTS Silicon Design Engineer (AECG ASIC Design Verification Lead)
Xilinx
Permanent Job
India
14-16 years
RISC
Uvm
AHB
APB
Axi
Verilog
C
Ovm
Shell
Makefile
Arm
System Verilog
Python
Perl
7 days ago
Silicon Design Engineer 2
Xilinx
Permanent Job
Hyderabad / Secunderabad, Telangana
,
India
5-7 years
ASIC
spyglass
RTL
Questa CDC
systemverilog
Cadence Conformal
Verilog
Tcl
Soc
Python
Vcs
Perl
12 days ago
Silicon Design Engineer 2
Xilinx
Permanent Job
Hyderabad / Secunderabad, Telangana
,
India
0-2 years
systemverilog
Uvm
RTL
Mentor Graphics
Verification
computer organization/architecture
Digital Design
Cadence
Vcs
8 days ago
Sr. Silicon Design Engineer
Xilinx
Permanent Job
Hyderabad / Secunderabad, Telangana
,
India
0-2 years
C/C++
Uvm
systemverilog
D3D
Opengl
Opencl
8 days ago
MTS Silicon Design Engineer
Xilinx
Permanent Job
Hyderabad / Secunderabad, Telangana
,
India
Fresher
7 days ago
Sr. Silicon Design Engineer
Xilinx
Permanent Job
Hyderabad / Secunderabad, Telangana
,
India
0-2 years
C/C++
Uvm
systemverilog
D3D
Opengl
Opencl
7 days ago
SOC Clock Lead - MTS Silicon Design Engineer
Xilinx
Permanent Job
India
Fresher
12 days ago
Sr. Silicon Design Engineer
Xilinx
Permanent Job
India
0-2 years
UPF
AXI MM
Timing Constraints
LEC
SOC design
embedded processors
cdc
Rtl Design
data fabric architectures
APB/AXI Stream
RDC
Verilog
Noc
Unix Shell
Makefile
Tcl
System Verilog
Python
Perl
8 days ago
SMTS Silicon Design Engineer
Xilinx
Permanent Job
Hyderabad / Secunderabad, Telangana
,
India
0-2 years
ASIC
Uvm
TLM
C
Systemc
Windows
C++
Linux
Verilog
Makefile
Shell
Ruby
System Verilog
Perl
8 days ago
SOC Implementation Lead - MTS Silicon Design Engineer
Xilinx
Permanent Job
India
0-2 years
Floor Planning
physical design tools
Upf
signoff checks
LVS
primetime
Calibre
power optimization techniques
Synopsys ICC2
Signal Integrity
Timing Closure
DRC
PNR
Redhawk-SC
Tcl
static timing analysis
Python
Perl
12 days ago
MTS Silicon Design Engineer
Xilinx
Permanent Job
India
10-12 years
UPF
AXI MM
SOC design
low power design
embedded processors
Rtl Design
data fabric architectures
APB/AXI Stream
Verilog
Unix Shell
Makefile
Tcl
System Verilog
Python
Perl
8 days ago
Sr. Silicon Design Engineer
Xilinx
Permanent Job
Hyderabad / Secunderabad, Telangana
,
India
0-2 years
UPF
AXI MM
Timing Constraints
LEC
SOC design
embedded processors
cdc
Rtl Design
data fabric architectures
APB/AXI Stream
RDC
Verilog
Noc
Unix Shell
Makefile
Tcl
System Verilog
Python
Perl
8 days ago
Software Engineer III, Embedded Systems/Firmware, Silicon
Google Inc
Permanent Job
Bengaluru / Bangalore
,
India
0-2 years
Security
accessible technologies
Mobile
large-scale system design
Embedded Operating Systems
Data Storage
Software Development
Networking
Natural Language Processing
Programming Languages
Ui Design
Distributed Computing
Algorithms
Artificial Intelligence
Information Retrieval
data structures
14 days ago
Pre Silicon Validation Engineer
PODS365 INC
Permanent Job
Bengaluru / Bangalore
,
India
8-10 years
ASIC IP cores
OVM/UVM
Synopsys HAPS platform
HBM
Vivado
Verilog/SV coding
System Verilog
Python
Pcie
Perl
14 days ago
Software Engineer III, Embedded Systems/Firmware, Silicon
Google
Permanent Job
Bengaluru / Bangalore
,
India
1-2 years
Data Storage
Security
Mobile
large-scale system design
Distributed Computing
Ui Design
Natural Language Processing
Information Retrieval
Networking
Artificial Intelligence
14 days ago
Silicon AI/ML Architect, TPU, Google Cloud
Google
Permanent Job
Bengaluru / Bangalore
,
India
8-10 years
AI/ML
RTL
Emulation
Go
Physical Design
ASIC
Design
Packaging
Verification
area
Power
Cost
Performance
Soc
C++
Python
Silicon Validation
9 days ago
Silicon Physical Design Engineer
Google
Permanent Job
Bengaluru / Bangalore
,
India
3-5 years
Physical Design Methodology
Floor Planning
Deep Submicron Technology
Place and Route (PnR Tools
systemverilog
Circuit Design
Flow Validation
device physics
Physical Design Tool Automation
Algorithms
Shell
Tcl
Verilog
Python
Perl
Data Structures
7 days ago
Silicon Physical Design Engineer I
Google
Permanent Job
Bengaluru / Bangalore
,
India
2-4 years
Physical Design Methodology
Floor Planning
Synthesis
RTL
Area
Low-Power Design Methodologies
PnR Tools
Power
Flow Validation
Gds
Computer Architecture
Shell
Performance
Tcl
Python
Perl
7 days ago
Emulation and Pre-Silicon Validation Engineer (4 - 10 Years)
SILCOSYS Solutions Pvt. Ltd.
Permanent Job
Bengaluru / Bangalore
,
India
4-10 years
Palladium
LPDDR4
ASIC
HBM
DDR4
LPDDR5
Assembly
Fpga
C
Pcie
Perl
Arm
Python
8 days ago
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