408

Silicon Jobs in Bhubaneswar

Sr. Silicon Design Engineer

Permanent Job

India

0-2 years

C/C++ Uvm systemverilog D3D Opengl Opencl

a month ago

Sr. Silicon Design Engineer

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

7-9 years

digital design concepts SOC integration reset data/control fabrics LINT LEC Timing Analysis systemverilog cdc NOC concepts Vdhl ASIC frontend methodologies Quality Checks RDC AMBA protocols clocking Verilog

a month ago

Sr. Silicon Design Engineer AECG ASIC Design Verification

Permanent Job

India

6-8 years

RISC Uvm AHB APB Axi Verilog C Ovm Shell Makefile Arm System Verilog Python Perl

a month ago

MTS Silicon Design Engineer ( Analog Mixed Signal Layout Engineer with 10+yrs )

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

10-12 years

Analog Mixed Signal Layout Bandgap pitch matching pads arrangements Calibre ADC SERDES virtuoso EMIR double patterning device matching Esd Layout Dependent Effects FinFet technology Skill Latch-up Pll IC23.1 Io Dac Tcl PERL

a month ago

MTS Silicon Design Engineer

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

8-10 years

Physical Design Implementation Synopsys Low power physical design implementation flows Mentor ML techniques Cadence Scripting Language Automation

a month ago

Design Verification SMTS Silicon Design Engineer AECG ASIC

Permanent Job

India

14-16 years

RISC Uvm AHB APB Axi Verilog C Soc Ovm Shell Makefile Arm System Verilog Python Perl

a month ago

MTS Silicon Design Engineer AECG ASIC Design Verification

Permanent Job

India

10-12 years

RISC Uvm AHB APB Axi Verilog C Soc Ovm Shell Makefile Arm System Verilog Python Perl

a month ago

MTS Silicon Design Engineer

Permanent Job

India

10-15 years

Uvm Debugging Skills Debug/triage CHI Ace Memory Controller kv Test plan review HW/SW co-verification Coverage System bus protocol understanding Axi JIRA C++ System Verilog Automation X86 Pcie DDR

a month ago

Verification Leads for complex Analog Mixed Signal IPs(SMTS Silicon Design Engineer)

Permanent Job

India

6-8 years

Uvm UPF RTL AMs GDDR System Verilog DDR

a month ago

Sr. Manager Silicon Design Engineering

Permanent Job

India

18-20 years

Sta Physical Design Verilog RTL design timing signoff Tcl Constraints Python Perl Shell

a month ago

Sr. Silicon Design Engineer

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

8-10 years

processor Uvm simulator SV Ace Architecture Verification Waveform AXI-Stream trace Isa Coherency Axi Usb Ethernet Pcie Cache

a month ago

PMTS Silicon Design Engineer AECG ASIC RTL design/Integration lead

Permanent Job

India

15-17 years

ASIC spyglass RTL LEC cdc VHDL low-power design memory controllers Processor based architectures C Soc Verilog System Verilog

a month ago

Sr. Silicon Design Engineer

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

0-2 years

C/C++ Uvm systemverilog D3D Opengl Opencl

a month ago

MTS Silicon Design Engineer

Permanent Job

India

7-9 years

RTL Synthesis IP integration Timing Analysis EM Dual Patterning Ir analytical establishing design methodology primetime circuit/logic simulation Placement DRC Design Compiler Power-plan LVS Cadence Genus computer organization tools for logic synthesis Layout Physical Verification CTS ICC2 clock and power gating techniques Synopsys Fusion Compiler Timing Closure Apache Redhawk FinFET Attention To Details scan stitching Place And Route floorplanning Schematics Problem Solving design optimization logic equivalence GDS2 architecture Extraction physical/timing/electrical quality Formal Equivalence final signoff Innovus PNR tools Mentor Graphics Calibre Crosstalk Analysis Floor-plan Physical Implementation Clock Tree Synthesis StarRC Routing

a month ago

MTS Silicon Design Engineer

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

8-10 years

Physical Design Implementation Synopsys Low power physical design implementation flows Mentor ML techniques Cadence Scripting Language Automation

a month ago

Sr. Silicon Design Engineer

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

5-7 years

Silicon IP development Perl/Shell scripting Verilog RTL design VCS simulation tool RDMA DMAs Tcp/ip Nvme Ethernet Pcie

a month ago

Sr. Silicon Design Engineer

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

4-6 years

ASIC spyglass RTL systemverilog Cadence Conformal primetime ICManage Questa CDC C Soc Vcs Verilog Tcl Perforce Python Perl Git

a month ago

MTS Silicon Design Engineer

Permanent Job

India

4-6 years

Physical Design Timing Analysis Place And Route Layout Attention To Detail Logic Synthesis design checks Schematics analytical/problem-solving skills circuit/logic simulation perl Tcl python Computer Architecture

a month ago

Formal Verification - MTS/SMTS/PMTS Silicon Design Engineer

Permanent Job

India

10-12 years

CPU verification formal verification SVA IEV IFV VSI-FV Verilog Shell System Verilog perl python Jasper

a month ago

SMTS Silicon Design Engineer

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

12-14 years

Asic verification UVM Methodologies C/C++ programming Verilog System Verilog Computer Architecture

a month ago

SMTS Silicon Design Engineer

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

12-14 years

ASIC LINT UPF Floor Planning RTL cdc DisplayPort Pd Synthesis Timing Closure Axi Eco Usb Tcl Ethernet static timing analysis Python PERL Pcie

a month ago

MTS Silicon Design Engineer

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

0-2 years

RTL Timing Constraints LINT UPF SoC level design integration CHI protocols timing exceptions cdc arm architecture APB Axi Tcl Python PERL

a month ago

Sr. Silicon Design Engineer

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

5-7 years

ASIC IEEE 802.3 MAC/PCS/PMA fec Time-Sensitive Networking AXI4-Lite Xilinx Implementation tools VHDL AXI streaming AN/LT PTP (IEEE 1588 Fpga Tcl Verilog Makefile Shell System Verilog Ethernet Perl

a month ago

Low Power Design Engineer, TPU, Silicon, Google Cloud

Permanent Job

Bengaluru / Bangalore ,

India

3-5 years

ASIC SoC designs power modeling low power design C/C++ high performance power optimization integration flows Soc Python Perl

a month ago

Senior Silicon CAD/EDA/Methodology Engineer, Google Cloud

Permanent Job

Bengaluru / Bangalore ,

India

Fresher

a month ago

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Silicon Jobs in Bhubaneswar

Sr. Silicon Design Engineer

Sr. Silicon Design Engineer

Sr. Silicon Design Engineer AECG ASIC Design Verification

MTS Silicon Design Engineer ( Analog Mixed Signal Layout Engineer with 10+yrs )

MTS Silicon Design Engineer

Design Verification SMTS Silicon Design Engineer AECG ASIC

MTS Silicon Design Engineer AECG ASIC Design Verification

MTS Silicon Design Engineer

Verification Leads for complex Analog Mixed Signal IPs(SMTS Silicon Design Engineer)

Sr. Manager Silicon Design Engineering

Sr. Silicon Design Engineer

PMTS Silicon Design Engineer AECG ASIC RTL design/Integration lead

Sr. Silicon Design Engineer

MTS Silicon Design Engineer

MTS Silicon Design Engineer

Sr. Silicon Design Engineer

Sr. Silicon Design Engineer

MTS Silicon Design Engineer

Formal Verification - MTS/SMTS/PMTS Silicon Design Engineer

SMTS Silicon Design Engineer

SMTS Silicon Design Engineer

MTS Silicon Design Engineer

Sr. Silicon Design Engineer

Low Power Design Engineer, TPU, Silicon, Google Cloud

Senior Silicon CAD/EDA/Methodology Engineer, Google Cloud