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97
Serdes Jobs
Software Engineer | Platform, Linux, Device drivers | 4-8 years
Cisico
Permanent Job
Bengaluru / Bangalore
,
India
4-8 years
CPLD
ASIC
Msa
SGMII
xaui
Chassis management
Linux KLM
SGMI
SERDES
Linux
Spi
Fpga
BIOS
I2c
Python
Pci
a month ago
Senior Design Verification Engineer/Lead
Sykatiya Technologies Pvt Ltd
Permanent Job
Bengaluru / Bangalore
,
India
5-7 years
SerDes IP verification
PLLs
CDR concepts
Uvm
networking IP designs
AMS interfaces
IEEE 802.3
VMM
Physical layer clauses
python
perl
Shell
a month ago
Sr. Electrical Validation Engineer, Devices
myGwork - LGBTQ+ Business Community
Permanent Job
Bengaluru / Bangalore
,
India
10-12 years
EE
Analog IP Characterization
equalization techniques
logic analyzers
Vlsi
High-Speed Analog/Digital Circuits
semiconductor physics
Ece
Power & signal integrity concepts
Pll
CS
protocol
Transmitter and Receiver design blocks
SERDES
BERT
High speed serial interface analog building blocks
PCB layout best practices
MATLAB
DDR
PERL
Python
Tcl
a month ago
Senior Analog Design Engineer
Vhunt4u
Permanent Job
Bengaluru / Bangalore
,
India
4-6 years
ADC
PLLs
layout issues
IO cells
Spectre
CMOS
SERDES circuits
circuit simulators
Cadence Design Environment
Hspice
DC-DC convertor
power management
mixed-signal
LDOs
Dac
Unix Shell Scripting
Analog
PERL
a month ago
Technical Lead
HCL Technologies Limited
Permanent Job
Bengaluru / Bangalore
,
India
0-2 years
IC Package Design
LPDDR
HDI
Dfm
GDDR
constraint setting
Allegro Package Designer
layout tool
flip chip designs
SERDES
DFA
3D
Buried Via
wire bond
2.5D
HSIO
MCM
PCB designs
Blind
Substrate design
substrate design
Stackup design
Pcie
DDR
a month ago
Software Engineer | Platform, Linux, Device drivers | 4-8 years
Cisico
Permanent Job
Bengaluru / Bangalore
,
India
4-8 years
CPLD
ASIC
Msa
SGMII
xaui
Chassis management
Linux KLM
SGMI
SERDES
Linux
Spi
Fpga
BIOS
I2c
Python
Pci
a month ago
MTS Silicon Design Engineer ( Analog Mixed Signal Layout Engineer with 10+yrs )
Xilinx
Permanent Job
Hyderabad / Secunderabad, Telangana
,
India
10-12 years
Analog Mixed Signal Layout
Bandgap
pitch matching
pads arrangements
Calibre
ADC
SERDES
virtuoso
EMIR
double patterning
device matching
Esd
Layout Dependent Effects
FinFet technology
Skill
Latch-up
Pll
IC23.1
Io
Dac
Tcl
PERL
a month ago
Senior Application Engineer
Synopsys Inc
Permanent Job
Bengaluru / Bangalore
,
India
4-6 years
Design Compiler
primetime
Fusion Compiler
SERDES
PCI Express
5 months ago
A&MS Circuit Design Engr, Sr II
Synopsys Inc
Permanent Job
Hyderabad / Secunderabad, Telangana
,
India
6-8 years
Ultrasim
Cadence
layout effects
ESD issues
HSIM
custom design
amplitude
transistor level circuit design
noise
communication
signal integrity issues
system level budgeting
Documentation
custom digital design
Packaging
SERDES sub circuits
post processing of simulation results
jitter
board parasitics
Hspice
Design for reliability
crosstalk
Analog Design
Scripting
5 months ago
A&MS Layout Design Engr, II
Synopsys Inc
Permanent Job
Bengaluru / Bangalore
,
India
0-2 years
tool usage
Analog Mixed-signal layout
floorplanning techniques
process technology
latch-up layout design considerations
ownership
layout co-ordination activities
written communication skills
CMOS
Remote site interaction
Esd
Verification
Deep submicron effects
high-speed SerDes IPs
mitigation
Accountability
Verbal Communication Skills
FinFET layouts
development teams
5 months ago
Application Engineer
Synopsys Inc
Permanent Job
Bengaluru / Bangalore
,
India
2-3 years
Synthesis
Design Compiler
Logical Equivalence Check
Fusion Compiler
SERDES
serial ata
Gate Level simulation
RTL
PCI Express
PrimeTrime
Static Timing Analysis
5 months ago
Sr. Engineer
Synopsys Inc
Permanent Job
Pune
,
India
0-2 years
Mixed Signal
DSP Basics
SV
receivers
SERDES
bandgap
test benches
Simulation
analog circuit designs
transmitter
Uvm
Pll
op-amp
Verification
100G+
Test Plans
Analog
Shell
Perl
Python
5 months ago
SoC/Interface IP Applications Engineer, Staff
Synopsys Inc
Permanent Job
Bengaluru / Bangalore
,
India
5-7 years
Organizational
project management
SOC design
IC design
Sales Support
semiconductor ip
MIPI
ASIC
SERDES
connectivity protocols
program management
Verification
customer facing
Eda
Usb
technical communication
Interface
DDR
Pcie
Ethernet
5 months ago
Principal Analog Design Engineer
Marvell Semiconductors
Permanent Job
Bengaluru / Bangalore
,
India
10-12 years
Pll
ADC
Hspice
transceivers
analog IC design
regulators
Cadence Virtuoso
high-speed SerDes
Spectre
Dll
MATLAB
5 months ago
Mgr I, A&MS Circuit Design
Synopsys Inc
Permanent Job
Bengaluru / Bangalore
,
India
8-12 years
Digital
transceivers
LVS
UCIe
Hspice
mixed-signal verification flow
HBM
SERDES
DRC
communication interfaces
Matlab/Simulink
IC CAD tool
Analog
DDR
5 months ago
Sr. Staff Analog Design Engineer
Marvell Semiconductors
Permanent Job
Bengaluru / Bangalore
,
India
6-8 years
ADC
Tx
Rx
transceivers
analog IC design
high-speed SerDes
Spectre
Pll
CDR
Hspice
automotive-specific requirements
Cadence Virtuoso
Dll
MATLAB
4 months ago
Signal Integrity Architect
FlexAI
Permanent Job
Bengaluru / Bangalore
,
India
10-12 years
EMI/EMC
TDR
Oscilloscopes
IBIS-AMI Modelling
VNA
PKG
BERTs
jitter analysis
SIwave
LPDDR4
Pcb
power delivery
SERDES
Ansys HFSS
PDN
DDR4
Signal Integrity
Hyperlynx
Sso
Ddr3
4 months ago
Senior Staff Design Engineer - Analog IC Design
Marvell Semiconductors
Permanent Job
Bengaluru / Bangalore
,
India
6-8 years
ADC
Tx
Rx
transceivers
analog IC design
high-speed SerDes
Spectre
Pll
Standards
CDR
Hspice
Collaboration
automotive-specific requirements
Cadence Virtuoso
communication
Dll
MATLAB
4 months ago
Applications Engineering, Staff Engineer
Synopsys Inc
Permanent Job
Bengaluru / Bangalore
,
India
2-5 years
Verilog Hdl
Verification
English
Synthesis
MIPI
Physical Design
Parallel interfaces
ASIC Design
Analog Design
Simulation
Place And Route
Design Reuse
High-speed SERDES
5 months ago
Staff Engineer, Verification
Marvell Semiconductors
Permanent Job
Bengaluru / Bangalore
,
India
7-9 years
CVS
AMS simulation
Simulation Tools
regression mechanisms
High Speed SerDes
Cadence
Uvm
VHDL
PHYs
configuration management system
Asynchronous clock domain crossing verification
IP architecture
systemverilog
specification
Gatelevel simulation
digital logic
test-bench development
clock data recovery
Hardware Verification
Ovm
Svn
Verilog
automation
Scripting Languages
Perl
Linux Operating System
Bug Tracking
4 months ago
Senior RF Analog IC Design Engineer
Intel Corporation
Permanent Job
Bengaluru / Bangalore
,
India
6-8 years
Drivers
Circuits
Mixed-Signal
CAUI-4
Cadence
Mentor
Recovery
Modeling
Pll
Design
signal
SERDES
NRZ
modulation
OIF-25G-VSR
Ic
PAM4
Trans-Impedance
Channel
Optical
Amplifiers
Data
Communications
Limiting
Laser
Rf
Integrity
Architectures
clocking
TIA
Analog
5 months ago
Layout Design, Staff Engineer
Synopsys Inc
Permanent Job
Pune
,
India
Fresher
floor-planning techniques
tool usage
Analog Mixed-signal layout
process technology
latch-up layout design considerations
ownership
layout co-ordination activities
hands-on technical skills
written communication skills
CMOS
28nm
Remote site interaction
Esd
Verification
Deep submicron effects
high-speed SerDes IPs
mitigation
Accountability
Verbal Communication Skills
FinFET layouts
5 months ago
Applications Engineering, Staff Engineer
Synopsys Inc
Permanent Job
Bengaluru / Bangalore
,
India
2-3 years
Synthesis
Design Compiler
Logical Equivalence Check
Fusion Compiler
SERDES
serial ata
Gate Level simulation
RTL
PCI Express
PrimeTrime
Static Timing Analysis
4 months ago
Applications Engineering, Staff Engineer
Synopsys Inc
Permanent Job
India
2-3 years
Synthesis
Design Compiler
Logical Equivalence Check
Fusion Compiler
SERDES
serial ata
Gate Level simulation
RTL
PCI Express
PrimeTrime
Static Timing Analysis
5 months ago
Applications Engineering, Staff Engineer
Synopsys Inc
Permanent Job
Noida
,
India
2-3 years
Synthesis
Design Compiler
Logical Equivalence Check
Fusion Compiler
SERDES
serial ata
Gate Level simulation
RTL
PCI Express
PrimeTrime
Static Timing Analysis
5 months ago
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