144

Rtl Verification Jobs

Silicon Application Engineer

Permanent Job

Bengaluru / Bangalore ,

India

1-3 years

Synthesis timing reports RTL simulation Design Verification SV UCIe API-C test cases HBM SERDES Memory Links hardware debug CXL DPI-C functions backend collateral quality industry standard simulators C DDR Pcie Ethernet Firmware

3 months ago

Physical Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

0-2 years

IC design Floor Planning RTL timing constraint design closure Timing Analysis Physical Verification Place And Route timing signoff ESD analysis timing ECO physical implementation Synthesis crosstalk analysis formal verification EM analysis low power verification netlist power grid implementation Clock Tree Synthesis power analysis

5 months ago

Physical Design Engineer

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

1-10 years

power analysis Constraint Management RTL Synthesis Physical Verification ASIC C++ Cpu Perl Verilog Python Tcl

5 months ago

STA/Synthesis/signoff Design and Verification Engineer.

Permanent Job

Bengaluru / Bangalore ,

India

0-2 years

Sta Signoff Documentation RTL Signal Integrity Verification Design Area Synthesis Collaboration Timing Power Netlists Performance

4 months ago

Sr IP Application Engineer

Permanent Job

Bengaluru / Bangalore ,

India

3-6 years

Simulators IP Integration Design Verification DPI-C Functions RTL Customer Focused Implementation Listening Skills Data Sheets HBM Debug API-C Test Cases user guides Post-Silicon Validation Resolve UCIe Verification Alphawave Products Application Notes Backend Collaterals Communication Skills Hardware Debug Silicon Bring up SERDES Timing Closure product briefs CXL Simulation Diagnose Pre-silicon Validation DDR Pcie Firmware Ethernet

5 months ago

Silicon Application Engineer

Permanent Job

Bengaluru / Bangalore ,

India

1-3 years

Synthesis RTL simulation Design Verification Timing Analysis UCIe API-C test cases hardware debug HBM DPI-C functions CXL mixed signal designs DDR Pcie Ethernet Firmware

4 months ago

Software Engineer- Principal

Permanent Job

Noida ,

India

8-10 years

Low Power SOC Design Dc Fusion compiler SV RTL to GDS flow Gate sign off tools Prime Power Verification Prime time Synthesis ASIC VHDL Zebu digital logic RTL Architect joules Perl Verilog Python Tcl

4 months ago

Lead Software Engineer

Permanent Job

Noida ,

India

2-6 years

Debugging Skills Dc Fusion compiler RTL to GDS flow low-power SOC design principles Simulation Gate sign off tools Prime Power Prime time Design Synthesis ASIC VHDL digital logic Place & Route SV Verification Zebu RTL Architect joules Verilog Python Hdl Languages Perl Tcl

4 months ago

Hiring DV engineers/ Analog designers

Permanent Job

Bengaluru / Bangalore ,

India

0-2 years

Sta AMS simulation SI/PI simulations RTL Pcb Design Analog Circuit Design Layout Dft Pd power management Verification Circuit Design Embedded Software Development analog circuits

5 months ago

Design Verification Engineer:

Permanent Job

Bengaluru / Bangalore ,

India

2-7 years

functional coverage modelling DV planning Uvm SV UVM based env Risk Mitigation GLS RISC CPUs RTL debugging skills Communication Skills Verification AMBA Code coverage analysis Ovm Shell Pcie Verilog Test Plan Sata Python System Verilog Usb Nvme Perl Ethernet Arm Tcl

4 months ago

Senior/Staff DFT Engineer

Permanent Job

Bengaluru / Bangalore ,

India

5-12 years

Memory Simulation RTL Physical Design reason Logic Synthesis Dft formal verification ATPG bist Synopsys Static Timing

4 months ago

Front-end Technical Manager (Chip Design)

Permanent Job

Bengaluru / Bangalore ,

India

10-20 years

Synthesis Dft cdc project management EDA Tools Stakeholder Management Verification power management RTL coding guidelines Digital Design

4 months ago

Physical Design Manager

Permanent Job

Bengaluru / Bangalore ,

India

9-11 years

Execution Debug Team Management RTL Physical Implementation Management Physical Verification planning Leadership strengths Coach communication GDSII Prioritizing Unix Perl Tcl

4 months ago

Senior/Staff/Sr Staff Physical Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

7-15 years

Physical Verification RTL Physical Implementation GDSII Unix Perl Tcl

4 months ago

Frontend Technical Manager - Semiconductor Chip Design

Permanent Job

Bengaluru / Bangalore

10-20 years

1000000 - 8000000 INR

Project Planning Execution Digital Design Verification Dft Rtl Design VHDL testbenches verification strategies CDC issues EDA Tools stakeholder communication process improvement semiconductor chip design Verilog

5 months ago

Solutions Engineer, Sr II

Permanent Job

Bengaluru / Bangalore ,

India

8-10 years

Physical Verification RTL Physical Implementation GDSII Unix Perl Tcl

5 months ago

ASIC Digital Design Engr II

Permanent Job

Bengaluru / Bangalore ,

India

0-2 years

micro architecture coverage Metrix Unit Level Testing Design Verification verification team ASIC Digital Design RTL Debugging

5 months ago

Physical Design Manager

Permanent Job

Bengaluru / Bangalore ,

India

10-12 years

Tcl/Unix/Perl scripting Physical Verification Methodology design challenges debug skills RTL Physical Implementation GDSII PPA Goals

5 months ago

Senior Staff Physical Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

6-8 years

Synthesis Timing Analysis RTL Physical Design Physical Verification digital logic VHDL EDA Tools Gds Methodology Perl Verilog Computer Architecture Python Tcl

3 months ago

RTL Design Engineer - Staff (Video)

Permanent Job

Bengaluru / Bangalore ,

India

2-4 years

Verdi cdc Simulation debugging SoCs Linting Team Player verification engineers micro-architecting ASICs AI/ML Synthesis VHDL formal verification Low Power RTL Coding Hardware Implementation Dsp Multimedia System Verilog Verilog Video Codecs Debugging Computer Vision

3 months ago

SOC Design and Verification Engineer

Permanent Job

Bengaluru / Bangalore ,

India

0-2 years

Verification Engineer Synthesis SOC design RTL Coding Timing Closure verification processes SOC design system-level simulations UVM-based testing testbench development DFT insertion

4 months ago

Design verification Engineer

Permanent Job

Bengaluru / Bangalore ,

India

5-7 years

Rtl Design Design universal verification methodology (uvm) communication Verilog

5 months ago

Design Verification Engineer

Permanent Job

Ahmedabad ,

Pune

4-8 years

SOC/IP Verification System Verilog/UVM RTL

5 months ago

Frontend Technical Manager

Permanent Job

Bengaluru / Bangalore

10-20 years

50000 - 10000000 INR

Chip Design Rtl Design RTL Coding Verification

4 months ago

Physical Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

5-7 years

floor-planning multi-power domain design RTL area (PPA) Place & Route LVS checks advanced technology nodes Attention To Detail Physical Design Engineer Power Cadence Implementation tool suite communication Synthesis Timing EMIR/PV closure physical verification (PV) and signoff DRC EMIR (Electromigration and IR drop) analysis and closure problem-solving abilities Teamwork Skills low-power design techniques GDSII Python Performance Tcl

5 months ago

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rtl verification Jobs

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Rtl Verification Jobs

Silicon Application Engineer

Physical Design Engineer

Physical Design Engineer

STA/Synthesis/signoff Design and Verification Engineer.

Sr IP Application Engineer

Silicon Application Engineer

Software Engineer- Principal

Lead Software Engineer

Hiring DV engineers/ Analog designers

Design Verification Engineer:

Senior/Staff DFT Engineer

Front-end Technical Manager (Chip Design)

Physical Design Manager

Senior/Staff/Sr Staff Physical Design Engineer

Frontend Technical Manager - Semiconductor Chip Design

Solutions Engineer, Sr II

ASIC Digital Design Engr II

Physical Design Manager

Senior Staff Physical Design Engineer

RTL Design Engineer - Staff (Video)

SOC Design and Verification Engineer

Design verification Engineer

Design Verification Engineer

Frontend Technical Manager

Physical Design Engineer