212

Rtl Design Jobs in Bengaluru Bangalore

Senior Staff Physical Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

6-8 years

Synthesis Timing Analysis RTL Physical Design Physical Verification digital logic VHDL EDA Tools Gds Methodology Perl Verilog Computer Architecture Python Tcl

3 months ago

CPU expert

Permanent Job

Bengaluru / Bangalore ,

India

0-2 years

Architecture Design cross-functional collaboration RTL devlopment Teamwork analytical Soc integration Troubleshooting CPU optimization communication CPU technologies Problem-solving

3 months ago

Sr Staff Engineer - Power Amplifier RFIC Design

Permanent Job

Bengaluru / Bangalore ,

India

6-8 years

LNA Gain EM simulations using EMX analog mixed-signal blocks matching networks mixer ADEXL power amplifier design Spectre/AMS simulations GaAs technologies Keysight ADS Layout XL OPamps Verilog-based RTL DC operating point post-Si qualification procedures noise Stability current mirrors Cadence Virtuoso suite Schematic SW IIP3 nonlinearity SOI BGR VGA OP1dB Pa Amplifiers Keysight Momentum NF ACPR EVM frequency response hfss Maestro RFIC

3 months ago

Senior Engineer I - DFT

Permanent Job

Bengaluru / Bangalore ,

India

4-6 years

primetime high-speed NCSim Tessent MBIST RTL TetraMax DFT Compiler spyglass VHDL Tessent ATPG small-tech node design DesignCompiler SNPS SMS compilers TestKompress static timing analysis Vcs UNIX Jtag Perl Verilog Tcl

3 months ago

SOC Design and Verification Engineer

Permanent Job

Bengaluru / Bangalore ,

India

0-2 years

Verification Engineer Synthesis SOC design RTL Coding Timing Closure verification processes SOC design system-level simulations UVM-based testing testbench development DFT insertion

4 months ago

Lead Product Development Engineer, Analog Test Engineer

Permanent Job

Bengaluru / Bangalore ,

India

12-14 years

test bench development Design for Test Si debug mentor tools RTL Coding Analog IPs Debug on chip interconnect buses shmoo analysis micro-architecture Synopsys System Verilog Jtag Shell Perl Python Statistical Analysis

3 months ago

Physical Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

5-7 years

floor-planning multi-power domain design RTL area (PPA) Place & Route LVS checks advanced technology nodes Attention To Detail Physical Design Engineer Power Cadence Implementation tool suite communication Synthesis Timing EMIR/PV closure physical verification (PV) and signoff DRC EMIR (Electromigration and IR drop) analysis and closure problem-solving abilities Teamwork Skills low-power design techniques GDSII Python Performance Tcl

5 months ago

Senior Design Verification Engineer

Permanent Job

Bengaluru / Bangalore ,

India

5-7 years

Design Verification Physical Design RTL

5 months ago

Co-Op/ Intern

Permanent Job

Bengaluru / Bangalore ,

India

0-2 years

Testbench Power & Clocking Digital Electronics Design Verification Uvm Problem Solving VHDL RTL Coding Digital Design python C PERL Verilog Debugging System Verilog Tcl

5 months ago

ASIC Physical Engineer Staff

Permanent Job

Bengaluru / Bangalore ,

India

8-10 years

Physical Synthesis Physical Verification RTL Cadence Mentor Design closure Place & Route Design planning ASIC SI prevention Physical Design Gds EDA Tools Power reduction Floor Planning Timing Constraints Synopsys Unix Static timing analysis Perl Tcl

4 months ago

Experienced Logic Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

4-6 years

RTL Digital Design Techniques Pcie Ethernet System Verilog

5 months ago

ASIC Digital Design, Staff Engineer

Permanent Job

Bengaluru / Bangalore ,

India

6-7 years

RTL architecture design Verilog Testbenches ASIC Digital Design MIPI DSI ip design AMBA FIFOs SPRAM/ DPRAM Synthesizable Verification micro architecture design HDMI 2.1 C/C++ Perforce System Verilog Python Tcl

5 months ago

R&D Engineering, Staff Engineer

Permanent Job

Bengaluru / Bangalore ,

India

5-7 years

VHDL timing constrains RTL FPGA design tools C/C++ graph algorithms static timing analysis Verilog data structures Digital Logic Design

5 months ago

Senior/Staff DFT Engineer

Permanent Job

Bengaluru / Bangalore ,

India

5-12 years

Memory Simulation RTL Physical Design reason Logic Synthesis Dft formal verification ATPG bist Synopsys Static Timing

5 months ago

Business Development Manager

Permanent Job

Bengaluru / Bangalore ,

India

2-5 years

SD Card Semiconductor UFS ssd Management Marketing eMMC Relationship Management Hardware Design Sales RTL-IP development People Skills Test and Measurement Industry Flash Memory Ms Office Word Application Engineering Embedded Software Development Outlook DDR Pcie Excel

5 months ago

SoC Design Engg - SD

Permanent Job

Bengaluru / Bangalore ,

India

5-7 years

Physical Design Synthesis Block Structural Design RTL-to-GDS Flow Ip APR Electrical/Reliability Analysis Area High Performance Architecture Tapeout Flows Power Timing Logic Design Principles Static-Timing Low Power Micro Architecture Full-Chip Floor-Planning Performance Tcl Python Perl

5 months ago

SoC Design Engg - SD

Permanent Job

Bengaluru / Bangalore ,

India

7-9 years

5 months ago

R&D Engineering, Sr Engineer

Permanent Job

Bengaluru / Bangalore ,

India

2-4 years

VHDL HDL/RTL languages FPGA prototyping tools Digital Design C/C++ graph algorithms Windows/Unix Verilog data structures

5 months ago

Lead System Validation

Permanent Job

Bengaluru / Bangalore ,

India

5-7 years

Verilog RTL coding PHY lab equipment Analyzers Systems Interop IP/SoC Physical Layer Electrical Validation Oscilloscopes High speed SERDES UCIe Bit Error Rate Testers Compliance Testing CXL Protocol Exercisers C/C++ FPGA Design python Schematic design Pcie Ethernet

5 months ago

SR Application Engineer

Permanent Job

Bengaluru / Bangalore ,

India

3-5 years

power analysis Advanced Node RTL Physical Design low power/multi-voltage physical implementation CAD automation methods floorplanning Timing ASIC implementation DRC closure DRC/LVS Logic Synthesis Placement Parasitic Extraction equivalence checking GDSII Design Methodologies Clock Tree Synthesis static timing analysis routing Python data preparation Perl Tcl

5 months ago

Senior R&D Engineer

Permanent Job

Bengaluru / Bangalore ,

India

5-7 years

chip design flow RTL synthesis frontend C/C++ Algorithms Eda data structures

5 months ago

Applications Engineer, Senior Staff - Serdes IPs

Permanent Job

Bengaluru / Bangalore ,

India

10-15 years

SI/PI Simulation Physical Design Implementation Lab Floor Planning Design ASIC RTL synthesis Design verification flows Timing Closure HIP/SIP integration Verification Silicon bring-up Soc Pcie Ethernet Protocols

5 months ago

ASIC Front-end Implementation Engineer, Staff

Permanent Job

Bengaluru / Bangalore ,

India

4-8 years

Design Compiler RTL Synthesis VC-SpyGlass Fusion Compiler Formality RTL Reset Domain Crossing LEC UPF systemverilog spyglass Clock Domain Crossing CPF Prime Time Perl Verilog Python Tcl

5 months ago

SoC Design Engg - SD

Permanent Job

Bengaluru / Bangalore ,

India

7-9 years

RTL coverage analysis product-level parameters Place And Route EDA Tools power and noise analysis placing Synthesis flow automation power/clock distribution multiple power domain analysis Floor Planning electrical rule checking static and dynamic power integrity Reliability layout verification formal equivalence verification structural design checking physical clock design Gds Timing Closure Dft Clock Tree Synthesis Methodologies static timing analysis routing

5 months ago

R&D Engineering, Sr Staff Engineer

Permanent Job

Bengaluru / Bangalore ,

India

10-12 years

procs Extraction Spice RTL signoff DV PNR Gds ip development Circuit Design namespace Algorithms Verilog Tcl

5 months ago

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Rtl Design Jobs in Bengaluru Bangalore

Senior Staff Physical Design Engineer

CPU expert

Sr Staff Engineer - Power Amplifier RFIC Design

Senior Engineer I - DFT

SOC Design and Verification Engineer

Lead Product Development Engineer, Analog Test Engineer

Physical Design Engineer

Senior Design Verification Engineer

Co-Op/ Intern

ASIC Physical Engineer Staff

Experienced Logic Design Engineer

ASIC Digital Design, Staff Engineer

R&D Engineering, Staff Engineer

Senior/Staff DFT Engineer

Business Development Manager

SoC Design Engg - SD

SoC Design Engg - SD

R&D Engineering, Sr Engineer

Lead System Validation

SR Application Engineer

Senior R&D Engineer

Applications Engineer, Senior Staff - Serdes IPs

ASIC Front-end Implementation Engineer, Staff

SoC Design Engg - SD

R&D Engineering, Sr Staff Engineer