212

Rtl Design Jobs in Bengaluru Bangalore

Sr. Principal Digital Design Lead

Permanent Job

Bengaluru / Bangalore ,

India

15-17 years

ASIC Synthesis M55 heterogenous processor cores low power design processor A55 GIC Coresight Debug Design for Test interconnect fabric RISC-V TZC DSP fundamentals AHB U55 MMU formal equivalence APB Axi LINT RTL DSP core M4 SMPU System-Verilog cdc caches Stream protocols DMA trace SPU Timing Closure low power design DFT concepts silicon debug power analysis Soc Architecture Verilog Soc

a month ago

Wifi MAC -Design Engineer -Sr Lead

Permanent Job

Bengaluru / Bangalore ,

India

1-3 years

Digital ASIC Synthesis Conformal Low Power UPF stdcell libraries process technology RTL PTPX SAIF Computer Arithmetic primetime multibit mapping datapath design Conformal ECO MCMM Circuit Design formal verification Pd memories Processor Design Microarchitecture power intent Dft

a month ago

CPU Physical Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

2-7 years

Physical Design power supply management Tcl/Perl scripting multi-Vt flow power gating problem-solving skills PDN methodology RTL to GDSII implementation timing signoff Sta PDN activities PPA targets high speed cores IC design low power flow circuit level comprehension

a month ago

Principal Engineer Digital Design

Permanent Job

Bengaluru / Bangalore ,

India

12-16 years

Sta insolation strategy Mentor cdc digital PLL design digital system Team Working Skills RTL Synthesis micro-controller IP design Microarchitecture Written And Verbal Communication Skills custom Analog Blocks arm architecture multi-tasking Linting silicon upf ARM processors Axi DFT tools Logic Synthesis AHB analytical/problem solving skills Logic Design Digital Signal Processing

a month ago

Staff Engineer, ASIC Development Engineering (Physical Design)

Permanent Job

Bengaluru / Bangalore ,

India

5-10 years

Sta Design Compiler RTL Conformal UPF DFT Compiler low power design Dft ASIC RTL Compiler Clp Shell PERL Tcl

a month ago

Staff Engineer, ASIC Development Engineering (Physical Design)

Permanent Job

Bengaluru / Bangalore ,

India

5-10 years

Sta Design Compiler RTL Conformal UPF DFT Compiler low power design Dft ASIC RTL Compiler Clp Shell PERL Tcl

a month ago

Silicon AI/ML Architect, TPU, Google Cloud

Permanent Job

Bengaluru / Bangalore ,

India

8-10 years

AI/ML low power design techniques performance test plans Go RTL Coding arithmetic units bus architectures high performance design techniques accelerators memory hierarchies ASIC design flows Soc C++ Python

a month ago

Technical Lead, ASIC IP and Subsystem Design, Silicon

Permanent Job

Bengaluru / Bangalore ,

India

8-10 years

memory subsystems rtl development ASIC Design micro architecture design systemverilog industry standard interfaces Verilog System Design

a month ago

Applications Engineer, Staff

Permanent Job

Bengaluru / Bangalore ,

India

6-8 years

Synthesis back-end flow digital design front end flow Interface Protocols English AMBA ASIC RTL simulations ASIC design lifecycle Fpga Usb DDR Pcie Ethernet

a month ago

Pre - Silicon Validation

Permanent Job

Remote ,

India

8-12 years

CPU Verification processor Memory analytical validation content Uvm Graphics Video RTL validation Design system simulation models architecture validation platforms staging Audio verification test plans validation coverage display Ip Problem Solving test bench infrastructure AMBA Axi feature scoping Pre-Si validation AHB C Ovm Debugging System Verilog C++ Soc Pci

5 months ago

Silicon Application Engineer

Permanent Job

Bengaluru / Bangalore ,

India

1-3 years

Synthesis timing reports RTL simulation Design Verification SV UCIe API-C test cases HBM SERDES Memory Links hardware debug CXL DPI-C functions backend collateral quality industry standard simulators C DDR Pcie Ethernet Firmware

3 months ago

Physical Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

0-2 years

IC design Floor Planning RTL timing constraint design closure Timing Analysis Physical Verification Place And Route timing signoff ESD analysis timing ECO physical implementation Synthesis crosstalk analysis formal verification EM analysis low power verification netlist power grid implementation Clock Tree Synthesis power analysis

5 months ago

STA/Synthesis/signoff Design and Verification Engineer.

Permanent Job

Bengaluru / Bangalore ,

India

0-2 years

Sta Signoff Documentation RTL Signal Integrity Verification Design Area Synthesis Collaboration Timing Power Netlists Performance

4 months ago

Staff DV Engineer

Permanent Job

Bengaluru / Bangalore ,

India

6-8 years

verification methodologies Simulation RTL simulation tools SOC design Embedded Systems emulation platforms Assembly Computer Architecture C Makefile automation Scripting Languages System Verilog

5 months ago

Mgr Logic Design

Permanent Job

Bengaluru / Bangalore ,

India

2-10 years

processes Emulation Methodologies tape-outs Ip RTL product concepts ASIC silicon design Micro-architecture Verification Validation Soc Debugging

5 months ago

Structural Design (Physical Design) Engineer

Permanent Job

Bengaluru / Bangalore ,

India

1-4 years

Cadence Mentor RTL Process Design Kit gds2 PDKs Siemens Synopsys perl Ansys Shell Tcl

5 months ago

ASIC Digital Design Engr II

Permanent Job

Bengaluru / Bangalore ,

India

0-2 years

micro architecture coverage Metrix Unit Level Testing Design Verification verification team ASIC Digital Design RTL Debugging

5 months ago

Physical Design Manager

Permanent Job

Bengaluru / Bangalore ,

India

10-12 years

Tcl/Unix/Perl scripting Physical Verification Methodology design challenges debug skills RTL Physical Implementation GDSII PPA Goals

5 months ago

Senior Staff Physical Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

6-8 years

Synthesis Timing Analysis RTL Physical Design Physical Verification digital logic VHDL EDA Tools Gds Methodology Perl Verilog Computer Architecture Python Tcl

3 months ago

CPU expert

Permanent Job

Bengaluru / Bangalore ,

India

0-2 years

Architecture Design cross-functional collaboration RTL devlopment Teamwork analytical Soc integration Troubleshooting CPU optimization communication CPU technologies Problem-solving

3 months ago

Sr Staff Engineer - Power Amplifier RFIC Design

Permanent Job

Bengaluru / Bangalore ,

India

6-8 years

LNA Gain EM simulations using EMX analog mixed-signal blocks matching networks mixer ADEXL power amplifier design Spectre/AMS simulations GaAs technologies Keysight ADS Layout XL OPamps Verilog-based RTL DC operating point post-Si qualification procedures noise Stability current mirrors Cadence Virtuoso suite Schematic SW IIP3 nonlinearity SOI BGR VGA OP1dB Pa Amplifiers Keysight Momentum NF ACPR EVM frequency response hfss Maestro RFIC

3 months ago

Senior Engineer I - DFT

Permanent Job

Bengaluru / Bangalore ,

India

4-6 years

primetime high-speed NCSim Tessent MBIST RTL TetraMax DFT Compiler spyglass VHDL Tessent ATPG small-tech node design DesignCompiler SNPS SMS compilers TestKompress static timing analysis Vcs UNIX Jtag Perl Verilog Tcl

3 months ago

SOC Design and Verification Engineer

Permanent Job

Bengaluru / Bangalore ,

India

0-2 years

Verification Engineer Synthesis SOC design RTL Coding Timing Closure verification processes SOC design system-level simulations UVM-based testing testbench development DFT insertion

4 months ago

Silicon Application Engineer

Permanent Job

Bengaluru / Bangalore ,

India

1-3 years

Synthesis RTL simulation Design Verification Timing Analysis UCIe API-C test cases hardware debug HBM DPI-C functions CXL mixed signal designs DDR Pcie Ethernet Firmware

4 months ago

Engineer II - ASIC Design

Permanent Job

Bengaluru / Bangalore ,

India

4-6 years

4 months ago

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Rtl Design Jobs in Bengaluru Bangalore

Sr. Principal Digital Design Lead

Wifi MAC -Design Engineer -Sr Lead

CPU Physical Design Engineer

Principal Engineer Digital Design

Staff Engineer, ASIC Development Engineering (Physical Design)

Staff Engineer, ASIC Development Engineering (Physical Design)

Silicon AI/ML Architect, TPU, Google Cloud

Technical Lead, ASIC IP and Subsystem Design, Silicon

Applications Engineer, Staff

Pre - Silicon Validation

Silicon Application Engineer

Physical Design Engineer

STA/Synthesis/signoff Design and Verification Engineer.

Staff DV Engineer

Mgr Logic Design

Structural Design (Physical Design) Engineer

ASIC Digital Design Engr II

Physical Design Manager

Senior Staff Physical Design Engineer

CPU expert

Sr Staff Engineer - Power Amplifier RFIC Design

Senior Engineer I - DFT

SOC Design and Verification Engineer

Silicon Application Engineer

Engineer II - ASIC Design