Power Optimization Jobs

IP Physical design engineer

Permanent Job

Bengaluru / Bangalore ,

India

2-4 years

Physical Implementation formal verification Low Power verification Physical Verification power optimization CTS Floor-planning Sta PDN Place And Route PNR Timing Closure Dft Perl Scripting Tcl Python

2 days ago

Silicon Digital Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

0-2 years

LINT design for testing UPF systemverilog Low Power Optimization/Estimation Rtl Design Logic Synthesis Synthesis CDC/RDC ATPG/Memory BIST ASIC design methodologies Scripting Language Digital Logic Design Verilog

15 hours ago

Silicon Digital Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

0-2 years

Synthesis LINT UPF design for testing Low Power Optimization/Estimation systemverilog Logic Synthesis Rtl Design ATPG/Memory BIST CDC/RDC ASIC design methodologies Digital Logic Design Scripting Language Verilog

a day ago

ASIC Digital Design, Engineer

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

0-2 years

1650000 - 1574000 INR

ASIC design flow Synthesis bug resolution Documentation Timing Analysis Verilog/System Verilog Digital Design semiconductor technology Place And Route Electronic Devices silicon chips Rtl Design target application requirements area efficiency performance optimization ASIC projects ASIC solutions power optimization Test Plans

5 days ago

RTL Design Lead

Permanent Job

Bengaluru / Bangalore ,

India

8-12 years

safety requirements power analysis system level use case scenarios Debug tools written and verbal communication skill UPF/CPF spyglass mentoring and developing people EDA Tools Design-for-Test Physical Design implementation bus architectures power optimization JasperGold LEC FrontEnd tools SoC Debug architectures VCS/Questa/Incisive simulators constraints development Design-for-Debug Formal verification tools Soc Clp Static Timing Analysis Arm

10 days ago

SOC Implementation Lead - MTS Silicon Design Engineer

Permanent Job

India

0-2 years

Floor Planning physical design tools Upf signoff checks LVS primetime Calibre power optimization techniques Synopsys ICC2 Signal Integrity Timing Closure DRC PNR Redhawk-SC Tcl static timing analysis Python Perl

13 days ago

SOC Implementation Lead with 13+ years experience(SMTS )

Permanent Job

India

0-2 years

9 days ago

SOC Implementation Lead with 13+ years experience(SMTS )

Permanent Job

Bengaluru / Bangalore ,

India

0-2 years

power optimization techniques Redhawk-SC signoff checks LVS Upf physical design tools Floor Planning Signal Integrity primetime Calibre PNR Timing Closure DRC Synopsys ICC2 static timing analysis Perl Python Tcl

9 days ago

SOC Implementation Lead with 13+ years experience(SMTS )

Permanent Job

Bengaluru / Bangalore ,

India

0-2 years

power optimization techniques Redhawk-SC signoff checks LVS Upf physical design tools Floor Planning Signal Integrity primetime Calibre PNR DRC Synopsys ICC2 static timing analysis Perl Python Tcl

9 days ago

ASIC Digital Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

0-2 years

1650000 - 1574000 INR

8 days ago

IC Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

Fresher

Sta congestion resolution floor-planning Tools LVS noise analysis ECO implementation Innovus formal verification Antenna dynamic environment equivalence checks global team communication Encounter power optimization caliber Learn adapt Methodologies Timing Analysis LEC ICC Problem Solving Physical Verification primetime SOC physical design ERC DRC Timing Closure partitioning Placement Crosstalk delay analysis Clock Tree Synthesis Route

21 days ago

IC Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

Fresher

21 days ago

IC Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

Fresher

21 days ago

Physical Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

6-8 years

SOC physical design LEC ICC caliber Timing Analysis Physical Verification equivalence checks primetime Placement power optimization Encounter global team Problem Solving Crosstalk delay analysis congestion resolution noise analysis Innovus Communication Skill Sta floor-planning formal verification dynamic environment Timing Closure partitioning ECO implementation Clock Tree Synthesis Route

15 days ago

Technologist, ASIC Development Engineering (Physical Design)

Permanent Job

Bengaluru / Bangalore ,

India

12-14 years

Physical Design Process Nodes EDA Tools power optimization Placement floorplanning Signal Integrity Routing Static Timing Analysis

15 days ago

Principal Engineer, ASIC Development Engineering (Physical Design)

Permanent Job

Bengaluru / Bangalore ,

India

12-14 years

Physical Design Implementation fast-paced EDA Tools problem-solving skills Placement floorplanning physical design flows power optimization techniques advanced process nodes communication Signal Integrity design teams dynamic environment Multiple Projects Timing Closure Leadership Skills Clock Tree Synthesis Static Timing Analysis routing

15 days ago

System Performance Engineer

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

4-6 years

mobile SoC architecture Ai power optimization performance optimization Silicon architecture Large Language Model system hardware memory subsystem Python System Software Ml Gpu C C++ System Software

a month ago

Electrical Manager Jobs in Abroad Countries

Permanent Job , International

Canada ,

Australia

2-11 years

3200000 - 5300000 INR

Electrical Industry Mechanical Electrical power supplies Electrical Electrical Drafting power optimization power devices Mechanical Engineers

a month ago

Staff Design Engineer

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

8-10 years

Memory Hierarchy tool flow processor design digital design methodologies lint checks Multi-clock domain Caches Memory subsystem GPU/AI/ML Processor architecture GLS Problem-solving AMBA AXI memory subsystem design Isa APB protocols performance and power analysis power optimization Datapath design Synthesis validation/verification area optimization Interconnects HW safety/protection Timing Analysis digital logic floating-point math multi-million gate ASIC design Automotive ISO 26262 Functional Safety Standard AHB Verilog Debugging System Verilog Computer Architecture Dsp Logic Design

a month ago

Silicon Low Power Design Engineer, TPU, Google Cloud

Permanent Job

Bengaluru / Bangalore ,

India

5-7 years

ASIC low power design techniques C/C++ high performance power optimization Soc Python Perl

a month ago

DV Engineer 5+ years exp

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

0-2 years

Systems Clocks circuit levels Management Interpersonal Skills power optimization CPU/GPU coherency Presentation communication architecture analysis Fabrics Memory sub-system I/O subsystems low power design Security Resets power management microarchitecture Gpu Cpu Virtualization Multimedia Soc Architecture Logic Design

a month ago

System Performance Engineer

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

4-6 years

mobile SoC architecture Ai power optimization performance optimization Silicon architecture Large Language Model system hardware memory subsystem Python System Software Ml Gpu C C++ System Software

a month ago

Silicon Low Power Design Engineer, TPU, Google Cloud

Permanent Job

Bengaluru / Bangalore ,

India

5-7 years

ASIC low power design techniques C/C++ high performance power optimization Soc Python Perl

a month ago

Chassis Power Architect, Device and Services, Silicon

Permanent Job

Bengaluru / Bangalore ,

India

5-7 years

power optimization post-silicon power calibrations reset RTL power gating systemverilog EDA Tools gate-level SPICE simulations statistical SPICE models clock -Artist PT/PTPX multi-voltage domains Incisive/VCS full chip power power management IPs low power design Conformal LP DC/RC power sequencing interactions UPF/CPF on chip power management IP design Debug Verilog

a month ago

Platform Software Architect, Power, Silicon Engineering

Permanent Job

Bengaluru / Bangalore ,

India

3-5 years

software interfaces Efficiency hardware experiences hardware accelerators ASIC architecture Embedded Systems SoC power optimization technical debt Software Development Performance Debugging Api Integration

a month ago

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Power Optimization Jobs

IP Physical design engineer

Silicon Digital Design Engineer

Silicon Digital Design Engineer

ASIC Digital Design, Engineer

RTL Design Lead

SOC Implementation Lead - MTS Silicon Design Engineer

SOC Implementation Lead with 13+ years experience(SMTS )

SOC Implementation Lead with 13+ years experience(SMTS )

SOC Implementation Lead with 13+ years experience(SMTS )

ASIC Digital Design Engineer

IC Design Engineer

IC Design Engineer

IC Design Engineer

Physical Design Engineer

Technologist, ASIC Development Engineering (Physical Design)

Principal Engineer, ASIC Development Engineering (Physical Design)

System Performance Engineer

Electrical Manager Jobs in Abroad Countries

Staff Design Engineer

Silicon Low Power Design Engineer, TPU, Google Cloud

DV Engineer 5+ years exp

System Performance Engineer

Silicon Low Power Design Engineer, TPU, Google Cloud

Chassis Power Architect, Device and Services, Silicon

Platform Software Architect, Power, Silicon Engineering