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Semiconductor Manufacturing Jobs
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Job Category
Fresher place route jobs
Part Time place route jobs
Freelance place route jobs
Walkins place route jobs
Work from Home place route jobs
81
Place Route Jobs
Staff Engineer Design
Infineon Technologies
Permanent Job
Bengaluru / Bangalore
,
India
5-7 years
Synthesis
FINFET technologies
Place & Route
Functional Safety
Timing Closure
RTL Coding
Technical Leadership
Scripting Languages
Programming Skills
5 days ago
Senior Engineer - Digital Electronics
Thales
Permanent Job
Bengaluru / Bangalore
,
India
5-8 years
high speed digital electronic circuits
Hardware Verification
electronic simulation
Dft
VHDL coding
Microcontrollers
Boards place&route
Design and simulation tools
Development
product performance evaluation
Manufacturing failures analysis
Component obsolescence treatment
electrical schematics
Electronic design
Defense & aeronautics constraints
Test procedures definition
DFM tools
Engineering Development lifecycles
Dfmea
Design Software
multi-disciplinary team
Timing Analysis
Embedded Firmware
Fpga
Microprocessors
Troubleshooting Skills
10 days ago
Staff SOC Engineer
Infineon Technologies
Permanent Job
Bengaluru / Bangalore
,
India
5-7 years
Place & Route
Synthesis
Physical Design
Timing Closure
RTL Coding
FINFET technologies
Functional Safety
Perl
Python
Tcl
9 days ago
Staff Engineer
Infineon Technologies
Permanent Job
Bengaluru / Bangalore
,
India
5-7 years
2000000 - 2600000 INR
Place & Route
Synthesis
Physical Design
Timing Closure
RTL Coding
FINFET technologies
Functional Safety
Technical Leadership
Scripting Languages
Programming Skills
9 days ago
Staff Engineer
Infineon Technologies
Permanent Job
Bengaluru / Bangalore
,
India
5-7 years
2000000 - 2600000 INR
Place & Route
Functional Safety
Synthesis
Physical Design
Timing Closure
RTL Coding
FINFET technologies
Programming Skills
Perl
Scripting Languages
Python
Tcl
9 days ago
MTS Silicon Design Engineer (Place and Route CAD Engineer )
AMD
Permanent Job
Hyderabad / Secunderabad, Telangana
,
India
8-10 years
Sta
Synthesis
CAD and Automation mindset
place and route methodologies
physical verification domains
Scripting Languages
13 days ago
Lead Product Validation Engineer
Siemens
Permanent Job
Noida
,
India
7-12 years
ASIC
Synthesis
Dc
Simulation
SV
Fusion compiler
Place & Route
Verification
digital logic
Low Power SOC design principles
Gate sign off tools
VHDL
Zebu
RTL to GDS flow
RTL Architect
Prime time
joules
Prime Power
Verilog
Tcl
Python
Debugging
Perl
a month ago
MTS Silicon Design Engineer (Place and Route CAD Engineer )
Xilinx
Permanent Job
Hyderabad / Secunderabad, Telangana
,
India
8-10 years
Synthesis
Physical Verification
Sta
Tcl
Python
PERL
17 days ago
Applications Engineering, Sr Engineer
Synopsys Inc
Permanent Job
Bengaluru / Bangalore
,
India
3-5 years
Verification concepts
test benches
FPGAs
FPGA P&R back end flow
FPGA architecture
Xilinx synthesis
Synthesis
FPGA implementation
FPGA Place&Route software
Hardware
Scripting
Logic Design
5 months ago
Senior Physical Verification Engineer
Excelmax Technologies
Permanent Job
Bengaluru / Bangalore
,
India
5-7 years
Sta
Memory
CTS
Place & Route
Analytical Skills
Problem-solving
Rtl Design
Physical Verification
Dft
Attention To Detail
GDS generation
Validation
Synthesis
AMS verification
floorplanning
LEC
RF layout design
Layout Design
SoC/subsystem integration and verification
IP verification
Functional Verification
Good Manufacturing Practice (GMP)
Chip Integration
partitioning
Debugging
Analog
5 months ago
Solutions Engineer, II
Synopsys Inc
Permanent Job
Bengaluru / Bangalore
,
India
3-5 years
Place & Route
3rd party tools
Vlsi
Signoff products
Physical Synthesis
RTL2GDS
Synopsys
Eda
Perl
Python
Scripting
Tcl
5 months ago
Solutions Engineer, II
Synopsys Inc
Permanent Job
Bengaluru / Bangalore
,
India
3-5 years
Place & Route
3rd party tools
Vlsi
Signoff products
Physical Synthesis
RTL2GDS
Synopsys
Eda
Perl
Python
Scripting
Tcl
5 months ago
A&MS Layout Design Engr
Synopsys Inc
Permanent Job
Bengaluru / Bangalore
,
India
4-6 years
LPE
DDR/HBM IP
layout automation
top level verification flow
Dfm
written communication skills
CMOS
28nm
bondpad layout
Scripting skills
Esd
Verification
latchup layout design considerations
IO frame
mitigation
Place & Route
IR considerations
Analog Mixed-signal layout
digital flow
IO abutment rules
Strategies
process technology
LEF generation
ASIC physical design flow
EM
DRC/LVS
pitch requirements
power rail routings
Advanced floorplanning techniques
high-speed digital
Deep submicron effects
Advanced tool usage
Verbal Communication Skills
FinFET layouts
5 months ago
Solutions Engineer, II
Synopsys Inc
Permanent Job
Bengaluru / Bangalore
,
India
3-5 years
Place & Route
3rd party tools
Vlsi
Signoff products
Physical Synthesis
RTL2GDS
Synopsys
Eda
Perl
Python
Scripting
Tcl
5 months ago
Layout Design, Sr Engineer
Synopsys Inc
Permanent Job
Bengaluru / Bangalore
,
India
4-6 years
LPE
DDR/HBM IP
layout automation
top level verification flow
Dfm
written communication skills
CMOS
28nm
bondpad layout
Scripting skills
Esd
Verification
latchup layout design considerations
IO frame
mitigation
Place & Route
IR considerations
Analog Mixed-signal layout
digital flow
IO abutment rules
Strategies
process technology
LEF generation
ASIC physical design flow
EM
DRC/LVS
pitch requirements
power rail routings
Advanced floorplanning techniques
high-speed digital
Deep submicron effects
Advanced tool usage
Verbal Communication Skills
FinFET layouts
5 months ago
Applications Engineering, Engineer
Synopsys Inc
Permanent Job
Bengaluru / Bangalore
,
India
0-2 years
Place & Route
Sta
Synthesis
Equivalency check
RTL Coding
Macro & Standard Cell Placement
Clock Tree Synthesis
Advanced Timing Optimization
Constraints
Routing
5 months ago
Layout Design Engineer
Synopsys Inc
Permanent Job
Bengaluru / Bangalore
,
India
2-10 years
Analog Mixed-signal layout
IO abutment rules
IR considerations
top level verification flow
Place & Route
EM
DDR IOs
customers
CMOS
power rail routings
bondpad layout
DRC/LVS
coordination activities
mitigation
Process
Verification
development teams
floorplanning techniques
ASIC physical design flow
FinFET layouts
Dfm
Remote site interaction
written communication skills
Digital
IO frame
layout automation
LPE
Deep submicron effects
LEF generation
Esd
Scripting skills
pitch requirements
Verbal Communication Skills
Technical Leadership
5 months ago
Technical Lead - Digital Design
Thales
Permanent Job
Bengaluru / Bangalore
,
India
8-12 years
Boards place & route
Root Cause Analysis
aeronautics standards
Ethernet Interface
analog electronic boards
ARINC-429
SMPTE
electronics components selection
lab measuring equipment
Microcontroller
UART RS-232
Manufacturing failures analysis
Component obsolescence treatment
EMI/EMC filter design
electrical schematics
RS-485
NOR
NAND Flash Interface
Circuit Simulation
Test procedures definition
Product Design
Design Software
RS-422
Embedded microprocessor
ddr2
multi-disciplinary team
Fpga
Spi
Pcie
I2c
Usb
Can
Ethernet
Ddr3
5 months ago
Sr. Physical Design Engineer - (Bangalore)
InnoPhase IoT
Permanent Job
Bengaluru / Bangalore
,
India
6-8 years
Logic Synthesis
Cadence EDA tools
Floor Planning
CTS specification
Place & Route
CPF/UPF specs design
Timing Closure
Physical Design
Power Planning
5 months ago
CPU PD - Staff
Qualcomm Technologies, Inc
Permanent Job
Bengaluru / Bangalore
,
India
2-4 years
Sta
High speed CPU implementation
Constraint management tool
Critical Path
constraint generation
Tempus
Conformal
Verilog Coding
ASIC flow
ASIC development/debugging
Validation
power domain implementation
Place & Route
area optimization
Formality
Clock Tree Implementation Techniques
Problem Solving
CPU micro-architecture
primetime
Low Power
Low power implementation techniques
UPF/CPF definition
Python
C++
Performance
Perl
Tcl
3 months ago
A&MS Layout Design Engr, Sr I
Synopsys Inc
Permanent Job
Bengaluru / Bangalore
,
India
4-6 years
LPE
DDR/HBM IP
layout automation
top level verification flow
Dfm
written communication skills
CMOS
28nm
bondpad layout
Scripting skills
Esd
Verification
latchup layout design considerations
IO frame
mitigation
Place & Route
IR considerations
Analog Mixed-signal layout
digital flow
IO abutment rules
Strategies
process technology
LEF generation
ASIC physical design flow
EM
DRC/LVS
pitch requirements
power rail routings
Advanced floorplanning techniques
high-speed digital
Deep submicron effects
Advanced tool usage
Verbal Communication Skills
FinFET layouts
5 months ago
Mixed Singal Design Engineer
Thales
Permanent Job
Bengaluru / Bangalore
,
India
5-12 years
component obsolescence treatment
Simulation Tools
Ethernet Interface
electronic simulation
Dfm
Aeronautics
Dft
analog electronic boards
power integrity analyses
boards place & route
Microcontroller
Signal Integrity process
high-speed frequency
VME 64
electrical schematics
digital functions
Signal Integrity
MIL_STD ?1553
Product Design
Engineering Development lifecycles
Dfmea
Design Software
test procedures definition
Military/VITA constraints
manufacturing failures analysis
Fpga
Arinc
Pcie
Emc
Can
5 months ago
Senior Engineer / Technical Lead (Mixed Signal Design)
Thales
Permanent Job
Bengaluru / Bangalore
,
India
5-12 years
Hardware Verification
Architectural Design
Manufacturing failures analysis
Component obsolescence treatment
Simulation Tools
Dfm
electrical schematics
digital functions
Dft
Test procedures definition
Product Design
Dfmea
analog electronic boards
Conceptual Design
Boards place&route
5 months ago
CPU STA/Timing Engineer- Sr Staff / Principal Engineer
Qualcomm Technologies, Inc
Permanent Job
Bengaluru / Bangalore
,
India
4-10 years
Sta
Synthesis
CAD
Digital
Place & Route
Rf
tapeout flows
Optical
Soc Architecture
Verilog
Analog
hardware engineering
3 months ago
Physical Design Engineer
Sintegra Inc.
Permanent Job
Bengaluru / Bangalore
,
India
5-7 years
floor-planning
multi-power domain design
RTL
area (PPA)
Place & Route
LVS checks
advanced technology nodes
Attention To Detail
Physical Design Engineer
Power
Cadence Implementation tool suite
communication
Synthesis
Timing
EMIR/PV closure
physical verification (PV) and signoff
DRC
EMIR (Electromigration and IR drop) analysis and closure
problem-solving abilities
Teamwork Skills
low-power design techniques
GDSII
Python
Performance
Tcl
5 months ago
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