Logic Verification Jobs

Applications Engineering, Sr Engineer

Permanent Job

Bengaluru / Bangalore ,

India

3-5 years

Verification concepts test benches FPGAs FPGA P&R back end flow FPGA architecture Xilinx synthesis Synthesis FPGA implementation FPGA Place&Route software Hardware Scripting Logic Design

5 months ago

Senior/Staff DFT Engineer

Permanent Job

Bengaluru / Bangalore ,

India

5-12 years

Memory Simulation RTL Physical Design reason Logic Synthesis Dft formal verification ATPG bist Synopsys Static Timing

5 months ago

Physical Design Engineers (RTL2GDSii Engineers)

Permanent Job

Bengaluru / Bangalore ,

India

5-7 years

Dc IR/EM analysis Synopsys Tool suite Cadence Tool Suite DRC/LVS Convergence Ansys Redhawk-SC RTL2GDSii primetime Calibre/ICV Timing Analysis Conformal/Formality Logic Synthesis Floor-planning Place And Route ICC2/Fusion/Innovus Design Flow formal verification VC-LP Perl Python Tcl

5 months ago

SoC/IP Pre-Silicon Verification Engineer

Permanent Job

Bengaluru / Bangalore ,

India

7-12 years

Low Power Verification Uvm UPF RTL make Logic Equivalence Checking assertion based verification System Verilog Python Perl

5 months ago

GPU Logic Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

11-15 years

Graphics platforms functional units retirement Rtl Design micro architecture competitive pay total compensation package RTL Coding architecture PC products vacation 2 in 1s Stock Compute Cell Libraries Business Needs GPU IP block enriching Timing all in ones Ip Health hybrid work model register transfer level verification plan Notebooks benefit programs Performance Analysis Soc Integration Desktops Logic Design

5 months ago

Formal Verification Sr Staff Engineer

Permanent Job

Bengaluru / Bangalore ,

India

8-15 years

temporal logic assertion-based languages formal verification hardware specifications Formal Method debugging skills EDA formal tools Scripting Language

5 months ago

Staff Design Engineer

Permanent Job

Hyderabad / Secunderabad, Telangana ,

India

0-2 years

processor design digital design methodologies lint checks Multi-clock domain simd Parallel Processing VLIW GLS MIMD AMBA AXI System on Chips memory subsystem design ASIC Design APB protocols power optimization Datapath design Synthesis validation/verification area optimization Interconnects Ai Timing Analysis digital logic floating-point math Automotive ISO 26262 Functional Safety Standard ML Processor architecture AHB micro architecture Gpu Verilog System Verilog Dsp

4 months ago

Staff Engineer, Verification

Permanent Job

Bengaluru / Bangalore ,

India

7-9 years

CVS AMS simulation Simulation Tools regression mechanisms High Speed SerDes Cadence Uvm VHDL PHYs configuration management system Asynchronous clock domain crossing verification IP architecture systemverilog specification Gatelevel simulation digital logic test-bench development clock data recovery Hardware Verification Ovm Svn Verilog automation Scripting Languages Perl Linux Operating System Bug Tracking

4 months ago

Graphics Performance Modelling Architect

Permanent Job

Bengaluru / Bangalore ,

India

2-4 years

Memory GPU power modeling projection PrimeTime PX Power Artist Design Verification compiler development characterizations Post-Silicon clock power GPU driver ASIC Design Verification power optimizations GPU workload analysis low-power ASIC design techniques Assembly Cuda development CPU/GPU architecture/microarchitecture design development industry tools workload low-power ASIC optimization Vulkan Vlsi Design power verifications systemverilog tests DirectX3D Profiling Pre-silicon Estimation Graphics architecture register Microarchitecture Logic GPU architecture C/C++ Programming Language Scripting Verilog Python Performance Correlation Perl Opengl Opencl

4 months ago

Performance and QoS Modeling Tech. Team Lead

Permanent Job

Bengaluru / Bangalore ,

India

4-9 years

C/CPP programming python programing packet processing algorithms Statistics analysis SystemC programing Logic Design performance verification Network Routing

5 months ago

Digital Low Power Lead Design Verification Engineer

Permanent Job

Bengaluru / Bangalore ,

India

1-5 years

computational logic design post-si bring-up Uvm HW-SW debug Collaboration Verification communication Ovm Hdl Scripting Languages Perl Verilog System Verilog Tcl

4 months ago

Software Engineer- Principal

Permanent Job

Noida ,

India

8-10 years

Low Power SOC Design Dc Fusion compiler SV RTL to GDS flow Gate sign off tools Prime Power Verification Prime time Synthesis ASIC VHDL Zebu digital logic RTL Architect joules Perl Verilog Python Tcl

5 months ago

Lead Product Engineer (Synthesis)

Permanent Job

Bengaluru / Bangalore ,

India

8-10 years

advance technology nodes Debug Implementation Logic Equivalence Checks Digital Design RTL2GDSII Problem Solving Cadence-Genus Synthesis Dft VHDL formal verification Synopsys-DC/FC front-end EDAT tools IC digital design flows communication Perl Verilog System Verilog Python Tcl

4 months ago

Lead Software Engineer

Permanent Job

Noida ,

India

2-6 years

Debugging Skills Dc Fusion compiler RTL to GDS flow low-power SOC design principles Simulation Gate sign off tools Prime Power Prime time Design Synthesis ASIC VHDL digital logic Place & Route SV Verification Zebu RTL Architect joules Verilog Python Hdl Languages Perl Tcl

5 months ago

FPGA Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

4-9 years

error correction codes Design Reviews logic synthesis tools verification methodologies DCT/IDCT Intel Quartus Simulation Xilinx Vivado FFT/IFFT VHDL FIR/IIR filters Modelsim Hardware Testing modulation schemes Dsp static timing analysis Debugging

4 months ago

Senior/Staff DFT Engineer

Permanent Job

Bengaluru / Bangalore ,

India

5-12 years

Memory Simulation RTL Physical Design reason Logic Synthesis Dft formal verification ATPG bist Synopsys Static Timing

5 months ago

Application Engineering, Sr Engineer

Permanent Job

Bengaluru / Bangalore ,

India

5-7 years

Implementation back end flow Verification concepts test benches FPGAs FPGA architecture Synthesis VHDL Xilinx synthesis software Hardware Scripting Verilog Logic Design

5 months ago

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Logic Verification Jobs

Applications Engineering, Sr Engineer

Senior/Staff DFT Engineer

Physical Design Engineers (RTL2GDSii Engineers)

SoC/IP Pre-Silicon Verification Engineer

GPU Logic Design Engineer

Formal Verification Sr Staff Engineer

Staff Design Engineer

Staff Engineer, Verification

Graphics Performance Modelling Architect

Performance and QoS Modeling Tech. Team Lead

Digital Low Power Lead Design Verification Engineer

Software Engineer- Principal

Lead Product Engineer (Synthesis)

Lead Software Engineer

FPGA Design Engineer

Senior/Staff DFT Engineer

Application Engineering, Sr Engineer