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21
Ip Design Jobs
Altera - Senior Ethernet MAC/PCS IP Design Engineer
INTEL
Permanent Job
Bengaluru / Bangalore
,
India
8-12 years
Networking domain
standard protocols
post Silicon issues
Digital Design fundamentals
system level understanding
debugging Simulations
Ethernet MAC/PCS IP design
IEEE 802.3 standard
micro architecture
Systemverilog/Verilog
11 days ago
ASIC Design Engineer
Micron
Permanent Job
Hyderabad / Secunderabad, Telangana
,
India
0-2 years
SOC design
Synthesis
GLS
automated verification flows
Interpersonal Communication Skills
Team Player
Implementation
Problem-solving
Rtl Design
test patterns
ip design
Silicon bring-up
Verification
Timing Analysis
Dft
Physical Design
RTL simulation debugging
Debugging
3 days ago
ASIC Design Engineer
Micron
Permanent Job
Hyderabad / Secunderabad, Telangana
,
India
0-2 years
SOC design
Synthesis
GLS
Team Player
Implementation
Problem-solving
Interpersonal Communication
Rtl Design
ip design
simulation debugging
Verification
Timing Analysis
Dft
Physical Design
Debugging
3 days ago
ASIC Design Engineer
Micron
Permanent Job
Hyderabad / Secunderabad, Telangana
,
India
0-2 years
SOC design
Synthesis
GLS
Implementation
Problem-solving
Interpersonal Communication
Rtl Design
Industry leading design flows
ip design
simulation debugging
Verification
Timing Analysis
Dft
Physical Design
Methodologies
3 days ago
Technical Lead, Application Specific Integrated Circuit IP Design
Google
Permanent Job
Bengaluru / Bangalore
,
India
6-8 years
Synthesis
LINT
High performance design
chip design flow
Domain Validation
memory compression
Multi power domains
coherence
Dynamic Random-Access Memory controller
Line Echo Cancellation
micro-architecture
Physical Design
CDC/RDC
Physical Layer Device
Design for testing
interconnects
Complex clocking
Quality Checks
Verilog
Coding
System Verilog
System Design
Cache
a month ago
Technical Lead, Application Specific Integrated Circuit IP Design
Google Inc
Permanent Job
Bengaluru / Bangalore
,
India
6-8 years
Synthesis
LINT
High performance design
chip design flow
Domain Validation
memory compression
Multi power domains
coherence
Dynamic Random-Access Memory controller
Line Echo Cancellation
micro-architecture
Physical Design
CDC/RDC
Physical Layer Device
Design for testing
interconnects
Complex clocking
Quality Checks
Verilog
Coding
System Verilog
System Design
Cache
a month ago
Wireless R&D IP Design Engineer - Staff
Qualcomm Technologies, Inc
Permanent Job
Bengaluru / Bangalore
,
India
2-4 years
Sta
Synthesis
Debug
high speed
Problem Solving
Interpersonal
Rtl Design
Critical Thinking
VHDL
Unix/Linux shell programming
Low Power
communication
Makefile
Perl
Verilog
System Verilog
Python
5 months ago
IP Design and Verification Engineer
Intel Corporation
Permanent Job
Bengaluru / Bangalore
,
India
10-12 years
Uvm
Eda
Perl
System Verilog
Python
Tcl
5 months ago
IP Design Verification Engineer
Intel Corporation
Permanent Job
Bengaluru / Bangalore
,
India
4-6 years
power management
OVM/UVM
DVE
Synopsys VCS Verdi
Network packet processing
Perl
Pcie
Ethernet
System Verilog
5 months ago
SOC/IP Design & Verification
Imspired Solutions
Permanent Job
Bengaluru / Bangalore
,
India
2-3 years
user interviews
UI elements
XD
google material design
Interaction
Ideation
development teams
Typography
Communication Skills
Figma
Visual Design
Wireframe
Mockups
4 months ago
IP Design and Verification Engineer
Intel Corporation
Permanent Job
Bengaluru / Bangalore
,
India
8-10 years
Uvm
Eda
Perl
System Verilog
Python
Tcl
5 months ago
Principal Engineer Digital Design
Infineon Technologies
Permanent Job
Bengaluru / Bangalore
,
India
12-16 years
Sta
insolation strategy
Mentor
cdc
digital PLL design
digital system
Team Working Skills
RTL
Synthesis
micro-controller IP design
Microarchitecture
Written And Verbal Communication Skills
custom Analog Blocks
arm architecture
multi-tasking
Linting
silicon
upf
ARM processors
Axi
DFT tools
Logic Synthesis
AHB
analytical/problem solving skills
Logic Design
Digital Signal Processing
a month ago
Chassis Power Architect, Device and Services, Silicon
Google
Permanent Job
Bengaluru / Bangalore
,
India
5-7 years
power optimization
post-silicon power calibrations
reset
RTL
power gating
systemverilog
EDA Tools
gate-level SPICE simulations
statistical SPICE models
clock
-Artist
PT/PTPX
multi-voltage domains
Incisive/VCS
full chip power
power management IPs
low power design
Conformal LP
DC/RC
power sequencing interactions
UPF/CPF
on chip power management IP design
Debug
Verilog
a month ago
ASIC Digital Design, Sr Engineer
Synopsys Inc
Permanent Job
Hyderabad / Secunderabad, Telangana
,
India
5-7 years
multi-core architectures
RISC architectures
oral communication skills
development techniques
problem-solving abilities
Interpersonal Skills
RISC microprocessor IP design
AMBA protocols
Uvm
written communication skills
System Verilog
a month ago
ASIC Verification, Staff Engineer
Synopsys Inc
Permanent Job
Bengaluru / Bangalore
,
India
4-5 years
SD/eMMC
ip design
Scatter Gather DMA
Uvm
HVL coding
VIP development
MIPI-I3C/UFS/Unipro
AMBA
VMM
VC Formal
SPI/I2C/I2S/UART
Usb
Ovm
DDR
Pcie
Perl
Verilog
Ethernet
System Verilog
Python
Tcl
a month ago
Senior Associate- Semiconductor
Lumenci
Permanent Job
Gurugram
,
Gurgaon / Gurugram
,
India
3-6 years
Semiconductor
characterization techniques
strategic technical advice
Ip
entrepreneurial attitude
Client Management
ip design methodologies
semiconductors
Electronics
circuit design implementations
Problem-solving
technical research
relationship management
processor architectures
Design
fabrication nodes
semiconductor technologies
ic packaging
Communication Skills
Technology Consulting
semiconductor device fabrication
a month ago
SOC/IP Physical Design
Imspired Solutions
Permanent Job
Bengaluru / Bangalore
,
India
0-2 years
design validation
Ip
Physical Design
design compliance
SOC/IP design trends
Technologies
Testing
Soc
4 months ago
Technologist, ASIC Development Engineering
Western Digital
Permanent Job
Bengaluru / Bangalore
,
India
0-2 years
mentorship
validation processes
STA tools
timing challenges
ip design
Digital Design
Dft
advancements
timing constraints development
Optimization
debugging techniques
STA Architect
STA methodologies
Design Reviews
design convergence
project managers
synopsys primetime
ASIC designs
Cadence Tempus
verification teams
Timing Closure
industry trends
Technical Leadership
Static Timing Analysis
Performance
3 months ago
Lead RTL(ASIC) Design Engineer
HARMAN India
Permanent Job
Bengaluru / Bangalore
,
India
7-12 years
LINT
cdc
ip design
Synthesis
Axi
ASIC
SoC Clocking/Reset Architecture
Timing Concepts
APB
AMBA Protocols
AHB
Rtl Design
Logic Design
5 months ago
Functional Safety Systems Lead Engineer - Senior/Staff Engineer
Qualcomm Technologies, Inc
Permanent Job
Bengaluru / Bangalore
,
India
2-8 years
Siemens 29500
FMEDA
Qualcomm Snapdragon
Fmea
CFSE
Functional Safety
IEC 61508
ip design
Requirements Management Tools
FTA
ISO 26262
IVI
CFSP
Doors
Adas
hardware engineering
Soc Architecture
4 months ago
ASIC Digital Design, Staff Engineer
Synopsys Inc
Permanent Job
Bengaluru / Bangalore
,
India
6-7 years
RTL architecture design
Verilog Testbenches
ASIC Digital Design
MIPI DSI
ip design
AMBA
FIFOs
SPRAM/ DPRAM
Synthesizable
Verification
micro architecture design
HDMI 2.1
C/C++
Perforce
System Verilog
Python
Tcl
5 months ago
1
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