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Fresher Unified Power Format Jobs
Synthesis Professionals
Edic Semicon
Permanent Job
Hyderabad / Secunderabad, Telangana
,
India
0-2 years
Sta
Cadence LEC
RTL to GDS flow
synthesis timing closure
RTL HDL languages
UPF
ECO flows
TCL language
unified power format
Dft
formal verification
VHD
Pd
Low power flows
Cadence Synthesis tool
Synopsys
Spyglass Lint
CDC checks
prime time
Clp
Perl
Verilog
5 months ago
1
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