Job Overview
Pattern Analytics is a new exciting field at the intersection of Electronic Design Automation, Data Science and Machine Learning, applied to Semiconductor Design and Silicon Manufacturing flows.
The role of Pattern Analytics Staff Engineer combines individual technical contributions with engineering teamwork to bring innovative computational solutions to market, from prototype to full product implementation. This role provides a unique opportunity to apply leading edge Machine Learning and Generative-AI to create entire new families of EDA tools for Physical Design and beyond.
Responsibilities And Duties
- Work with a global team of experts to identify new methodological approaches to layout analysis and define algorithmic solutions
- Develop software to be used throughout a product life cycle, from prototype to customer release
- Implement rigorous testing and benchmarking for Pattern Analytics tools
- Provide engineering-level technical documentation for the supported products
Qualifications
- Ph.D., M.S. or B.S. in EE or CS or related fields with strong computational and numerical analysis concentration or specialization.
- 3+ years experience in Electronic Design Automation, and/or VLSI Physical Design Verification, and/or Mask Data Generation is a plus.
- Specific skills in semiconductor design and manufacturing:
- Physical design, place and route
- DRC checks, DFM checks, Pattern Matching checks, Printability checks
- Physical design ECOs, layout fixing and automation
- Strong Database Development Skills are required. Specifically:
- Queries Development and Optimization SQL filtering, aggregation, sampling
- Graph representations, queries/traversal
- Multi-DB Query optimization, indices
- Server-based database implementation (such as PostgreSQL) and/or embedded database (such as SQLite)
- Programming Languages:
- Advanced Python 3, Javascript, SQL are required
- C++ and/or Java are a plus
- Asynchronous programming
- Applications/Libraries for Data Visualization and Machine Learning
- Application/Libraries for Computational Geometry and VLSI Layout manipulation
