Responsibilities
- Implementation (PnR & Signoff) of multimillion gate SoC designs in cutting edge process technologies (16nm and below nodes)
- All aspects of Physical Design including Floor Planning, Power Plan, Integrated Package and Floorplan design, Place and Route, Clock Planning and Clock Tree Synthesis, complex analog IP integration, Parasitic Extraction, Timing Closure, Power / IR Drop (Static and Dynamic), Signal Integrity Analysis, Physical Verification (DRC, ERC, LVS), DFM and DFY and Tapeout.
- Innovate on the flows to meet the QoR targets and ensure predictability
- Exposure to the latest design rules, processes and innovations need to close PPA on the advance nodes.
Qualifications
- Should have handled Netlist to GDS II at Chip/block level for multiple tape outs
- Should have worked on large sub-systems with multiple partitions
- Hands-on expertise with technology nodes like 16nm and below
- Good knowledge of EDA tools from Synopsys, Cadence and Mentor, particularly with Innovus & Calibre
- Hands-on experience in Chip/block floorplanning, placement optimizations, CTS and routing
- Excellent understanding and hands on experience with physical verification (DRC/LVS/ERC/antenna) and other reliability checks(IR/EM/Xtalk)
- Hands-on experience in block/top level signoff STA
- Exposure in physical implementation of timing/functional ECO's
- Being proficient in TCL, Python scripting is a plus
- Tech. / M. Tech. with 7-15 years of experience in Physical Design
Company Overview
MaxLinear is a global, NASDAQ-traded company (MXL) where the entrepreneurial spirit is alive and well. We are a fabless system-on-chip product company, striving to improve the world's communication networks for everyone through our highly integrated radio-frequency (RF), analog, digital, and mixed-signal semiconductor solutions for access and connectivity, wired and wireless infrastructure, and industrial and multi-market applications.
We hire the best people in the industry and engage them in some of the most exciting opportunities that connect the world we live in today. Our growth has come from innovative, bold approaches to solving some of the world's most challenging communication technology problems in the most efficient and effective manner.
MaxLinear began by developing the world's first high-performance TV tuner chip using standard CMOS process technology. Others said we couldn't achieve the extremely high-performance requirements using CMOS, but we proved them wrong and achieved enduring global market leadership with our designs. Since then, we've developed a full line of products that drive 4G and 5G infrastructure; enable data center, metro and long-haul optical interconnects; bring 10Gbit to the home; power the IoT revolution; and enable robust and reliable communication in harsh industrial environments. Over the years, we've expanded through organic growth and through several acquisitions that have perfectly complemented our existing portfolio and enabled us to deliver complete end-to-end solutions in our target markets. One such example was the acquisition of Intel's Home Gateway Platform Division that added Wi-Fi, Ethernet, and Broadband Gateway Processor SoC technology to our connected home portfolio creating a complete and scalable platform of connectivity and access solutions to fully address our customers needs.
Our headquarters are in Carlsbad, near San Diego, California. We also have major design centers in Irvine and San Jose, California; Waltham, Massachusetts; Vancouver, Canada; Valencia, Spain; Bangalore and Chennai, India; Villach, Austria; Munich, Germany; Israel; and Singapore.
We have approximately 1,500 employees, a substantial majority of whom have engineering degrees and include masters and Ph.D. graduates from many of the premiere universities around the world. Our employees thrive on innovation, outstanding execution, outside-the-box thinking, nimbleness, and collaboration. Together, we form a high-energy business team that is focused on building the best and most innovative products on the market.
