Staff Engineer I - ASIC Design (RTL)

Alphawave Semi enables tomorrow s future by accelerating the critical data communication at the heart of our digital world - from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology.

What Youll Do

• You will be responsible for pre-sales support, proposing architecture to customers based on their requirements.
• You will work with team to come up with architecture and micro-architecture and work with cross functional team to ensure delivery
• You will manage the design / RTL team to achieve the project goals
• You will work with customer, provide technical support and provide collaterals agreed upon
• You will work with team to achieve flow, methodology improvements to achieve high reuse
• You will work with IP vendors to generate / get right configurations of the IP
• You will manage team work allocation, schedule, risk mitigation and deliverables from design team.
• You will be reporting to Director - ASIC Design

What Youll Need:

• 8+ Years of expereince in understanding of ARM based architecture, CPU subsystems, interconnect, boot process, memory subsystem, knowledge of Interface IP blocks like PCIe or USB or Ethernet or DDRx controller, QSPI, DMA, or other similar blocks
• Good understanding of IPs, integration/application requirement, work with RTL team/vendors to achieve architecture goals
• Should have designed one or more ARM based ASIC/SoC and used one or more of PCIe, DDRx, USB, SATA,
• Should have good knowledge of multiple flavors of AMBA bus protocols & interconnect solutions available
• Should have good understanding of process / flow to achieve power & performance goals
• Should understand and work on all aspects of VLSI development from SoC architecture, micro architecture, RTL coding, RTL quality checks, silicon bring up.
• Should have good understanding of requirements from physical design, FPGA, Software, DFT and verification team.
• Should have handled a design from Spec to GDS-II
• Track design progress, working with cross functional teams, delivering on agreed upon milestones.
• Should provide mentoring and support to the team

Hybrid work environment

As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes:

• Competitive Compensation Package
• Restricted Stock Units (RSUs)
• Hybrid Working Model
• Provisions to pursue advanced education from Premium Institute, eLearning content providers
• Medical Insurance and a cohort of Wellness Benefits
• Educational Assistance
• Advance Loan Assistance
• Office lunch & Snacks Facility