Executes plans of record for physical design(RTL-GDSII), including schedules, resources, deliverables, and risks
Working independently with little supervision
Monitors and drives the program from initiation through delivery, interfacing with internal and external stakeholders across functions on technical matters, as needed
Monitors on-time delivery, and achievement of program milestones
Represents the program and drives alignment across stakeholders
Qualifications
10+ years of overall work experience.
Monitored End to end physical design for minimum 4 projects, atleast one of them being a first-generation project
Very good understanding of Metrics used to quantitatively measure PD status at different stages of design
Hands on exposure to Physical design
Exposure in end-to-end Physical design development from Netlist to GDSII.
Has worked on Synthesis, PNR, Timing analysis and closure, parasitic extraction, Signal integrity analysis and DRC sign off
Hands-on experience in handling sub-system
Interacted with Full-chip team for area/ SS shape finalization
Good understanding of all the inputs required for PD, RTL, libraries.
Worked with foundries/IP vendors to get the input collaterals like tech files, libraries, IP collaterals
