Job Description:
As an Applications Engineer, Senior Staff, you will contribute to making Synopsys HAPS Prototyping tool a technical and commercial success by creating specifications and validating the tool from customers perspective. In this role, you will be assuming complete responsibility of supporting the customer on all technical queries, analyze and propose recommendations for improving the QoR of HAPS prototyping tools. Leverage your expertise by writing Application notes and SolvNet articles to help customer understand the features and flow. You will need to independently work with R&D team on the feature validation, conduct test plan reviews involving all stake holders. As a senior member of the team, you will need to work with junior members and mentor them on various aspects of product validation.
Job Requirement:
- BE or ME with up to 10 years of experience in digital logic design and prototyping using FPGAs or FPGA based Hardware Verification Platforms.
- Strong knowledge on Verification concepts, writing test benches and simulating the designs.
- Should have experience in debugging on FPGA based hardware.
- Should have hands-on experience in HDL/ HVL (Verilog, System Verilog).
- Strong problem-solving skills.
- Should have good experience in Synthesis, STA, P&R flow, FPGA architecture.
- Excellent communication and inter-personal skills, professional attitude and strong desire to succeed.
- Knowledge on memory (DRAM, etc) and bus (AXI, etc) protocols is desirable.
- Scripting knowledge (Shell, Perl, TCL) is desirable.
