Senior VLSI CAD Methodology Engineer

Company Description

Genisup India Private Limited is a semiconductor and system design company based in Bangalore. We specialize in Foundational IP Fabless Design, Semiconductor & Product Engineering, and IoT solutions. The position is for our three clients (but not limited to): NXP, Qualcomm, and Analog Devices.

Role Description

This is a full-time on-site role for a Senior VLSI CAD Methodology Engineer. Genisup is seeking a highly motivated and talented VLSI CAD Methodology Engineer to join our growing team. You will play a pivotal role in developing cutting-edge design methodologies for foundational IPs and standard-cell libraries, enabling the creation of high-performance SoCs.

Responsibilities

• Design and implement state-of-the-art design methodologies for foundational IP integration into SoCs.
• Develop and validate electrical data interchange (EDI) views for standard-cell and I/O libraries in advanced technology nodes (28nm, 16nm, 5nm).
• Collaborate with PDK, foundation IP, and other methodology teams to understand library/cell architecture, design flow requirements, and device models.
• Architect and develop/support validation checks and automation methods to streamline the design process and improve productivity.
• Explore and implement AI/ML techniques to enhance the accuracy of models and accelerate design throughput.

Qualifications

• Minimum 5 years of experience in VLSI CAD methodology development involving foundational IPs, standard-cell, and I/O libraries.
• Proven experience with EDA views (LEF, LIB, NDM, OA, Extraction, Timing & Power).
• Solid understanding of library characterization flows and proficiency with EDA tools like Liberate/SiliconSmart, Solido, Crosscheck.
• Familiarity with physical design implementation, timing & power analysis (basic knowledge of Innovus/ICC, Redhawk/Voluts, Tempus/PrimeTime).
• Expertise in automation and scripting using Python, Perl, Tcl, or shell scripting languages.
• Strong debugging and root-cause analysis skills.

Desirable Skills:

Experience with EDA tool development and testing.

Knowledge of AI/ML methods a significant plus.

Academics:

Bachelor's degree (BE/B.Tech/ME/M.Tech) in Electronics & Communication Engineering (ECE), Computer Science (CS), or Electrical Engineering (EEE).

Join Genisup and be a part of a team that is pushing the boundaries of chip design! We offer a competitive compensation package and a stimulating work environment.