As a member of our focused group of HW engineering, the candidate will be involved in designing a stream processor and memory subsystem working on every aspect of hardware design and will be involved in close interactions with both SDK and backend teams for performance tuning, area, and power optimizations of multi million gate design.
BE/BTech/ME/MTech in Computer Science or Electronics or Electrical
Masters/ Bachelors in EE/EC/CS with 10+ years of experience in IP/SoC/ASIC Verification.
Should have experience in managing the teams for at least 3 years.
Leadership skills demonstrated as a part of the team.
Should have extensively worked on x86 or any other complex architecture.
Should have extensive knowledge in ULT development using UVM/SV, assembly programming and parallel programming.
Leading, managing, and developing a team of verification engineers by applying talent development and people management skills to create a motivated high-performance team.
Being a technical expert in overseeing a team that specializes in state-of-the-art simulation, emulation,and verification techniques.
Reviewing and creating test plans Full-chip functional verification on Blaize processor and Test BenchDevelopment in System Verilog targeting complete functionality coverage
Finding cost-effective and innovative verification and automation techniques and driving the team to implement them on new devices.
Should be able to come up with test plans along with estimates and risks
Understanding the processor architecture is a must.
Strategic planning to meet the organizations goals and to use resources optimally.
Experience in AMBA AXI, AHB, and APB protocols
Excellent Test Bench development, debugging and problem-solving skills.
ADDITIONAL SKILLS:
Knowledge on emulators like Palladium, Zebu a plus
Knowledge on FPGA Prototyping is a plus.
Knowledge in Automotive ISO 26262 Functional Safety Standard is a plus.
