Senior Engineer, Digital Design Engineering

Analog Devices, Inc. (NASDAQ: ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $12 billion in FY23 and approximately 26,000 people globally working alongside 125,000 global customers, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at and on .

• Building reusable sub-systems and systems, and drive automation with hands-on contribution during the integration of IP and sub-systems into ADI products
• Proactive in identifying ways to automate integration sub-systems and systems by abstracting essential IP details
• Contribute to ASIC digital system architecture, micro architecture, design, verification and implementation domains
• Continuously improve the development and support model employed on Digital Processing sub-systems to ensure a high level of scalability and efficiency in product engagements
• Support simulation and silicon verification and validation of sub-systems, test and evaluation of ASIC products and FPGA development systems
• Actively track and proactively communicate status to team and management using Agile development practices
• Good automation skills with Python or any other equivalent scripting language

• Bachelor's degree in Electrical Engineering, Computer Science, or Computer Engineering with 7+ years experience.
• Experience leading chip or sub-system architecture and/or digital design
• Strong engineering background in embedded system design, including ASIC microarchitecture, computer architecture, SoC architecture, and custom or standard DSP or hardware accelerator microarchitecture.
• A deep understanding of SoC design flow is essential. Should be able to work with the Verification, Synthesis, Physical Design and Timing/Power Analysis teams closely
• Knowledge of ARM, Tensilica and/or RISC-V processor subsystem architectures, on-chip interconnects, and advanced debug and trace will be extremely beneficial
• Excellent communication skills, ability to work within a cross-functional, global team