Senior Analog Design Engineer

Design, Development, and debugging of multi-Gb/s SERDES IP.

You will be part of a fast-growing analog and mixed signal R&D team developing high speed analog integrated circuits. Working from SerDes standards to block specifications, you quickly identify potential circuit architectures and successful design strategies. You will work with a cross functional design team of analog and digital designers from a wide variety of backgrounds. Our environment is best in class with a full suite of IC design tools supplemented by custom, in-house tools supported by an experienced software/CAD team.

Requirements

• Looking for 6-12 Yrs in Analog design
• In depth familiarity with transistor level circuit design - sound CMOS design fundamentals
• Exposure to SERDES sub circuits (ie. TX, RX ,adaptive Equalizers-(FIR, DFE, CTLE), PLL, DLL, BGR, Regulators, ADC etc)
• Aware of ESD issues (ie. circuit techniques, layout)
• Familiarity with custom digital design (ie. high speed logic paths)
• Knowledge of design for reliability (ie. EM, IR, aging, etc)
• Knowledge of layout effects (ie. matching, reliability, proximity effects, etc)
• Familiar with Custom design and/or HSPICE, HSIM, Ultrasim, etc
• Exposure to scripting for post processing of simulation results (ie. TCL, PERL, MATLAB etc)
• Some knowledge of system level budgeting (ie. jitter, amplitude, noise, etc)
• Aware of signal integrity issues (ie. effects of packaging, board parasitics, crosstalk, noise
• Good communication and documentation skills.