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Role: Semiconductor Design Engineer
Location: Chennai, India
Job description.
Good experience in writing complex RTL design in Verilog and System verilog.
Strong knowledge in IC chip design methodology.
Sound knowledge of RTL design and front-end design tools and flows.
Good experience in Synthesis, Constraint Development, Linting and CDC.
Good communication skills to work in a cross functional international team with analog, digital and software design engineers.
The design engineer should architect digital subsystem together with system designer.
Construction of module test cases and perform basic verification of the IP developed.
Perform synthesis, constraints development, LINT and CDC check.
Good Understanding of STA,formality,dft,synthesis flow.
Domain expertise in Ethernet,USB2,USB3,PCie,AXI,APB,SPI,UART,I2C,DDR.
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Date Posted: 10/06/2024
Job ID: 81360013