Required Skills:
Pre-silicon validation on Synopsys HAPS platform (8-12 years)
NP:- immediate and serving 15 -20 days joiners.
Jobsummary:
- To validate and debug ASIC IP cores for processors, AI models and peripherals such as PCIe, HBM on Synopsys HAPS platform
- Prototype and bring up of the SoC from scratch on HAPS platform and establish remote connectivity
- Knowledge of partitioning RTL code into multiple FPGAs
- Good exposure in timing closure using Vivado using HAPS toolchain
- Verilog/SV coding
- Development of validation plan
- Hardware-software co-verification
- Experience with Perl, Python, scripting (good to have)
- System Verilog and OVM/UVM (good to have)
- Experience with working on platforms such as Synopsys HAPS
- Should be able to work as a Technical lead for a team of 4 to 5 engineers
- Should have very good communication skills
- BE/B.Tech/ME/M.Tech in Electronics
Job Types: Full-time, Contractual / Temporary
Contract length: 6 months
Pay: 80,000.00 - 120,000.00 per month
Schedule:
- Day shift
- Monday to Friday
Ability to commute/relocate:
- Bangalore, Karnataka: Reliably commute or planning to relocate before starting work (Required)
Experience:
- Pre Silicon Validation Engineer: 8 years (Required)
- Synopsys HAPS platform: 8 years (Required)
Work Location: In person
Expected Start Date: 21/09/2024
