WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
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The Role
As a member of the S3 Group, you will help bring to life cutting-edge designs.As a member of the front-end design Verification team, you will work closely work with the architecture, IP design/Verif , SOC Design, Physical Design teams, and product engineers to achieve first pass silicon success. This role is very specifically focussed on the low power verification where the power aware verification is done for the complex SOC's which has multi power domains. As a Power management DV lead, priority task is on problem solving by being one among the team and provide adequate guidance on the technical issues faced during SOC verification team. Working experience with CPF/UPF flow. Expert in system verilog/uVM and C++ based test bench development. Expert in SOC debug. Very good knowledge in processor architecture and Control and data flow in SOC.
The Person
A successful candidate will work with senior and junior staff members. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills.
The Role
AMD's strategic focus is on developing one-of-a-kind solutions through its Strategic Silicon Solutions (S3) based on the extensive set of intellectual property (IP) amassed across AMD processors, graphics and multimedia. Providing to customers a level of flexibility and differentiation that goes beyond standard AMD products, our business unit takes AMD to a new level of customer-centric design by integrating these building blocks with customer-specific IP to create tailor-made solutions using a flexible System-on-a-Chip (SoC) design methodology. Our business unit features a strong team of engineers who have design wins in all major gaming consoles. They are exceptional and specialists in graphics and compute processing. The PlayStation 5 (PS5) from Sony Computer Entertainment Inc. (SCEI), the Xbox Series X from Microsoft are some examples of AMD's Strategic Silicon Solutions.
As a Senior Member of the Technical Staff for the pre-silicon IP design team, you will work closely with the architecture, IP design verification, SOC design/verif, and product engineers to achieve first pass silicon success. As an IP Design engineer, you will solve technical challenges and deliver on commitments to enable the program to be successful. The Strategic Silicon Solutions (S3) has a career making opportunity for a Senior Member of the Technical Staff!
The Person
- Excellent problem solving, analytical, and debug skills
- Must be a self-starter and able to independently drive tasks to completion
- Strong verbal and written communication skills to work with team members across multiple sites
Key Responsibilities
- Design of IP subsystems with integration of AMD and other 3rd party IP
- Solve challenging technical issues to meet program commitments
- Perform quality checks (lint, CDC, and power rule checks) of power-gated digital designs
- Work collaboratively with other members of the IP team to support design verification, implementation (synthesis, constraints, static timing analysis), and delivery to SOC
- Work in partnership with SOC teams to support the IP at SOC level, including connectivity, DFT, verification, physical design, firmware, and post-silicon bring-up
Preferred Experience
- 10+ years full-time experience in IP hardware design
- Experience with embedded processors and data fabric architectures
- Prior technical leadership experience, subject matter expert
- Outstanding problem-solving and analytical skills
- Outstanding interaction skills while communicating both written and verbally
- Ability to work with multi-level functional teams across various geographies
- Highly organized, able to prioritize and balance multiple work streams while working to meet and exceed goals
- Experience with 3rd party IP integration
- Proficiency in verilog/system verilog RTL logic design of high-speed, multi-clock digital designs
- Power saving techniques, including clock gating and UPF-based power gating
- Detailed understanding of ASIC design flows
- Verilog lint tools (Spyglass) and verilog simulation tools (VCS)
- Clock domain crossing (CDC) tools (0-in)
- Power domain checking tools (VC_LP)
- Strong Unix scripting and utilities (Shell, Perl, TCL, XML, Ruby, makefiles) for analysis and automation
Academic Credentials
Bachelors and/or Masters degree in related field preferred
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants needs under the respective laws throughout all stages of the recruitment and selection process. 
