- DV ownership of one or more features in the Low power audio subsystem(LPASS) core
- Developing a robust testbench, optimized for the specific feature/DUT
- Explore innovative DV methodologies (formal, simulation and emulation based) to continuously push the quality and efficiency of test benches and process improvements.
- Ensure a bug free silicon for Tape Out which eventually leads to a superb user experience of Snapdragon based computing devices
Minimum Qualifications:
Bachelors degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
OR
Masters degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
For better understanding of some of our products, please refer to the links below
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Qualcomm Aqstic | Qualcomm
Minimum Qualifications
- Minimum 3 - years of VLSI industry experience
- Strong debugging and analytical skills
- Strong knowledge of HDLs like Verilog, System Verilog
- Proficiency in developing SV/UVM based test benches
- Proficient in debugging RTL/TB issues using Verdi or similar tools
- Proficient with scripting languages such as Perl and(or) Python
Preferred Qualifications *
- Knowledge of UPF, low power architecture