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Job Role
The position is for a Lead Test Engineer with experience in post-silicon validation of Ethernet systems and a deep understanding of the IEEE 802.3 and 802.2 Ethernet standard specifications.
Expected to participate in defining the system validation plans and execution - test silicon board bring-up and test Ethernet silicon across channels(LR/MR/VR), and performing all the ethernet tests defined for and working with validation teams/design team in the debug of system-level issues.
Develop software scripts and custom firmware for optimizing SerDes IP performance in our lab and at the customer site.
Generate test reports, application notes, and technical marketing documents.
Good understanding of electronics and communication basics
Experience in ethernet system MAC + PHY integration and post-silicon validation.
Should have strong experience in layer-1 and layer-2 stacks of ethernet.
Proven experience with debugging and parametric analysis of high-speed digital/analog systems.
Strong bring-up and debugging expertise.
Experience with laboratory work and handling complex test equipment setups.
Experience in Post-Silicon validation and Root cause failure analysis.
Prior hands-on automation script development and optimization (using Perl/Python/C).
Proficient in using modern high-speed lab equipment (Keysight/Tek/Anritsu) like BERT, Scope, PNA, Spectrum Analyzer, LeCroy/Xena Protocol Analyzer/Exerciser, etc.
Working experience validating system-level designs based on processors and basic peripherals - I2C, UART, JTAG, etc.
Excellent analytical and problem-solving skills.
Must have good communication skills.
Working knowledge of Python/Perl/C scripting languages.
Highly motivated and enthusiastic about learning new skills
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