IREM Full Chip

Our client is engaged in VLSI services and turn key projects maintaining the core values of Quality and Commitment. They specialise in Physical Design, Synthesis & STA, Flow Development, Low Power Designs, digital design, ASIC Design, FPGA Design, and RTL Design

They are looking for IREM Full Chip to be based at Bengaluru with the following:

Must have 5+ years of experience on high complexity SoC designs preferably 7nm or lower technology nodes.

Must be able to develop the flow, scripts & perform various electrical analyses at Full Chip levels, including static/dynamic IR, power/signal EM, in-rush-current/powerup analysis and ESD.

Must be able to drive Full Chip level electrical verification closure

Must be able to develop static/dynamic IR, power/signal EM, ESD and power grid specs based on power/performance/area targets of different SOC blocks.

Must be able to Implement power grids in industry standard PnR tool environments, preferably in ICC2 and/or Fusion Compiler.

Must have experience in Validating the PG Grid using Grid Resistance & Secondary PG Resistance Checks.

Must be able to work closely with the Package and/or Power Integrity teams to optimize the overall PDN performance.

Kindly send your profile to tulsiarora(at)mysearch.in.net