Job Description
Opening for Internship in DDR IP verification team.
Verification Intern
Job Description: Successful candidate will be trained on functional verification of DDR PHY IP.
Duration: This is a 1-year internship position.
Education Requirements:
We are looking for NCG having no work ex, good academic background (BTECH), preferably with digital
electronics as a major.
Relevant Skills:
Verilog or System Verilog, C/C++, Tcl /Perl/shell scripting
Strong OO programming experience & Understanding of Computer Memory Organization is a plus.
Digital Electronics knowledge.
Location: Bangalore, India