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AMS IP Integration verification @ Sub-system and SoC level
AMS IP level test case porting to SoC level
AMS IP SoC level PDL test case development, Running regression in RTL/GLS & Timing simulations
AMS IP Virtual tester simulations in RTL/GLS & Timing simulations
Hands-on experience in Tessent DFT tool experience, Pattern generation, Simulation experience.
Experience with scripting languages like Python, Perl, skill, tcl or equivalent to automate flows is a plus.
Hands on Testbench bring up, integrating third party IPs, digital design, verification, debugging, and waveform debug
Knowledge on PLL, FLL, Temp/Current/Process sensors, Droop detector functionality & tests concepts
Knowledge on SoC level Interface/Configurability of AMS IP Registers
Knowledge on AMS IP functional test case porting knowledge
Generate of EVCD/Bench collaterals for target test cases
Partner with ATE/Bench team on Silicon bring up
Strong communication skills to interact with a global team.
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Date Posted: 25/11/2024
Job ID: 101418347