Mirafra is hiring for Emulation Engineers with 5+Yrs Emulation experience.
H1 Sponsorship available for 2024
KEY RESPONSIBILITIES:
- BE/MTECH with 5+ years of experience in Emulation/FPGA
- Create emulation models from RTL / Netlist. Develop hardware collateral to be integrated with the Palladium / FPGA emulation mode
- Developing emulation testbenches to support necessary DV scenarios and firmware/software/hardware bringup.
- Create and execute Test plans targeting Sub - systems and SoC level.
- Experience in Palladium or Zebuor Haps Platforms Automate and increase process efficiencies.
- Responsible for writing Directed tests to support end-to-end firmware/hardware/software validation.
PREFERRED EXPERIENCE:
- Knowledge of x86 and/or ARM SoC Architecture
- Knowledge of one or more protocols; SPI, DDR, SATA, USB, AXI, PCI, PCIe or I2C
- Experience developing C++, Python, Perl, Ruby, Shell and TCL test content.
- Experience developing System Verilog based test content.
- Experience debugging failures using waveform viewers, log files and microcode trace dumps.
- Experience debugging software using debuggers and trace files.
US Visa holders can also apply as I am having USA based openings as well.
Regards
Kalpana Bhatia
TA-Lead -Mirafra
[Confidential Information]
9718012760
