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Qualcomm Technologies, Inc

Digital Low Power Lead Design Verification Engineer

Early Applicant
  • 4 months ago
  • Be among the first 50 applicants

Job Description

  • As a leading technology innovator, Qualcomm pushes the boundaries of whats possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all
  • As a Qualcomm Hardware Application Engineer, you will provide technical expertise of hardware through trainings, product demonstrations, and the design, debug, test, and quality support of customer products
  • Qualcomm Hardware Application Engineers collaborate with cross-functional teams to assess the potential application of company products that meet and exceed customer needs
Minimum Qualifications:
Bachelors degree in Electrical/Electronics Engineering, Computer Engineering, or related field and 3+ years of Hardware Applications Engineering or Hardware Design experience or related work experience.
OR
Masters degree in Electrical/Electronics Engineering, Computer Engineering, or related field and 2+ years of Hardware Applications Engineering or Hardware Design experience or related work experience.
OR
PhD in Electrical/Electronics Engineering, Computer Engineering, or related field and 1+ year of Hardware Applications Engineering or Hardware Design experience or related work experience.
Job Description/Overview:
Low-Power IP Design verification Engineer for the next generation System-on-chip (SoC) for smartphones, Compute, Auto.
Job responsibilities:
  • Experience Required: 5+ Years of experience in IP Design Verification.
  • Ownership of DV test bench and other associated collaterals (Checkers, Trackers, Scoreboards, Assertion, Functional Coverage).
  • Develop test plan and test cases to cover design feature set, follow up with stake holders at different levels of test bench.
  • Work closely with Design, Subsystem/SOC teams on failure debugs, code/functional coverage closure.
  • Debug of regression signatures and identifying bug fixes.
  • Responsible for Quality sign off and required documentation.
  • Debug and root cause SS/SOC/post silicon issues in collaboration with Design teams.
  • Expertise in IP level /Sub-system level verification.
  • Understanding of standard bus protocol like AHB, AXI protocols would be a plus.
  • Having the right attitude to learn and quickly adapt to changing industry trends.
Required skillset:
  • Experience in HDL, verification, and general computational logic design/verification concepts.
  • Expertise in Verilog/System Verilog and UVM/OVM.
  • Strong debugging, Analytical and problem-solving skills.
  • Experience in developing Monitors, Scoreboards, Sequencers that utilize System Verilog, UVM, and methodologies to increase the rate with which bugs are found and resolved.
  • Experience in Scripting languages like Perl /Tcl would be a plus.
  • Post-si bring-up and HW-SW debug experience would be a plus.
  • Communication and collaboration skills to work with a large world-wide design organization.

More Info

Industry:Other

Function:Technology

Job Type:Permanent Job

Skills Required

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Date Posted: 12/07/2024

Job ID: 84411113

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