Design Verification

Hi,

Hiring for Permanent Role with our client.

Role : Design Verification

Bangalore Work Location

Years of experience : 2+ years

Kindly share the below details:

1) Current CTC

2) Expected CTC

3) Notice Period

4) Current Location

5) Comfortable with Bangalore location

6) Offer in hand

7) Total yrs of Exp

8) Exp in Design Verification:

9) Exp in GLS

10) Exp in System Verilog

11) Exp in UVM

Share the below details

• Contact Number
• Mail ID
• Current company
• Education Qualification
• Year Of Passing
• Current/Last Role:
• Current/Last Company:
• Reason for Leaving:
• Availability to Start:
• Availability for Interview:

Following skill set is required:

• Strong Debug, UVM, System Verilog
• Understanding Specs and Standards and developing relevant test plans
• Monitors, scoreboards, sequencers and sequences, that utilize scripts, System Verilog, UVM, and methodologies to increase the rate with which bugs are found and resolved
• Candidates should be comfortable checking our builds, navigating big test benches, analyzing coverage, and adding or enabling extra debug,
• Must be willing to dig into fail and understand what is happening
• Post-si bring-up and HW-SW debug experience would be a plus.
• Knowledge & exposure to silicon debug tool chains would be an added advantage

Kindly Whatsapp your Resume on 8660936062 (Geetha) or Email me on [Confidential Information] before calling

Thank You,

Geetha Thomodaran

HR Specialist

8660936062

Yallas Technologies Solutions

https://www.linkedin.com/in/geetha-t-900b4444/