Immediate requirement for Design Verification Engineers with PCIE Experience either in Soc/Ip preferred.
Company Description
Agasthya App Labs, established in 2016, is a new age service provider in the semiconductor and software industry. They specialize in semiconductor services such as design and verification, physical design, FPGA, ASIC, RTL design, and DFT designs.
Experience - 3 to 7 yrs
Location - Hyderabad
Role Description
This is a full-time on-site role for a Design Verification Engineer PCIE. As a Design Verification Engineer PCIE, your day-to-day tasks will involve formal verification, debugging, and other related tasks.
PCIE protocol Experience - Soc/IP Verification
- Experiencein debugging and troubleshooting
- Strong problem-solving and analytical skills
- Excellent written and verbal communication skills
- Ability to work collaboratively in a team environment
- Experience on PCIE protocols and standards is a plus
- Bachelor's or Master's degree in Electrical Engineering must.
So hurry up Interested candidates send your updated resumes to [Confidential Information] immediately!!!
