Circuit design Std cell & characterisation

Job description

Specific Responsibilities

Investigate, plan, and design and productize novel sub-threshold and near-threshold circuits and other related low power circuit techniques (e.g., adaptive body biasing, adaptive clock distributions, level shifters, customized standard cells, specialized memory structures, PDN modeling etc.).

Validate and refine low power circuit design techniques as part of a team that is building standard cells in advanced nodes (e.g., 12nm and beyond).

Work with product development teams (library characterization, Engineering, Architecture and Product Planning team) to rapidly deploy newly developed custom circuits and standard cells in products.

Develop and drive standard cell development activities for test and production chips owned by the Advanced Development team.

Maintain a relationship and collaborate with 3^rdparty CAD tool vendors and foundries during the development of new circuit design methodologies.

Requirement :

1.Proficiency in industry-standard EDA tools for transistor-level and circuit-level simulations, such as Cadence or Synopsys and Cadence Virtuoso Liberate/LV/Mx/Trio

2. Solid understanding of FinFET technology and its impact on standard cell library design and characterization.

3. Familiarity with circuit and layout design, static timing analysis (STA) and power analysis methodologies.

4. Strong analytical skills and attention to detail for data analysis and problem-solving.

5. advanced process nodes (e.g., 16nm, 12nm, 6nm or below) is highly desirable.

6. Effective communication and teamwork skills to collaborate with cross-functional teams and present findings and recommendations.

7.Exceptional candidates with a Master's degree will be considered.