Backend Technical Manager ( Semi Conductor Chip Design )

Job Title: Backend Technical Manager (Semiconductor Chip Design)

Location: Bangalore

Experience: 10-20 years

Salary- Open

Job Overview:

As a Backend Technical Manager, you will lead the execution of the back-end stages of integrated circuit development. This role requires a strong technical background in physical design, a deep understanding of semiconductor processes, and exceptional project management skills. You will oversee teams engaged in physical design, synthesis, DFT, place and route, power integrity, and other back-end aspects to ensure the successful realization of semiconductor designs. Additionally, you will oversee product support activities for both pre-production and post-production stages.

Key Responsibilities:

• Project Planning and Execution

-Develop and maintain project plans, timelines, and milestones for back-end design phases.

-Coordinate with engineering teams to align project goals with business objectives.

-Monitor project progress and mitigate risks.

• Stakeholder Communication

-Communicate project status, risks, and milestones to stakeholders.

• Continuous Improvement

-Identify opportunities for process improvement and efficiency gains in the chip design workflow.

• Physical Design and Optimization

-Oversee floor-planning, placement, and routing activities to optimize for area, power, and performance.

• Synthesis

-Oversee the synthesis process for RTL to gate-level translation, managing clock gating, multi-Vth, and library components.

• Timing Closure and Signal Integrity

-Lead efforts to achieve timing closure and address signal integrity issues using Static Timing Analysis (STA).

• Clock Tree Synthesis (CTS) and Power Distribution Network (PDN)

-Manage clock distribution networks and ensure robust power distribution.

• Multi-Voltage Design

-Manage multi-voltage designs incorporating level shifters, isolation, and power switch techniques.

• DFT

-Oversee Design For Test methods, including Memory BIST, Scan, and IP test, ensuring comprehensive coverage.

• Documentation

-Maintain accurate project documentation, ensuring compliance with industry standards.

• Physical Verification

-Oversee DRC, LVS, ESD, and ERC checks.

• Formal Verification

-Oversee Formal Verification to prove logic equivalence.

• Place and Route Optimization

-Optimize placement and routing for improved performance and manufacturability.

• EDA Tools for Back End

-Use EDA tools specific to back-end design stages.

• Packaging and Assembly Considerations

-Collaborate with packaging engineers for seamless integration.

Qualifications:

• 10-20 years of experience in semiconductor chip design.
• Expertise in physical design, synthesis, DFT, place and route, and power integrity.
• Strong project management skills.
• Proficiency in EDA tools.
• Excellent communication and stakeholder management skills.
• Proven track record in managing complex semiconductor design projects.