Analog Design Engineer

Job Description:

Experience in Mixed-Signal layout design.

To work independently on block levels analog layout design from schematic, estimating the Area, Optimizing Floorplan, Routing and Verifications. Firsthand experience in Critical Analog Layout design of blocks such as Temperature sensor, Serdes, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc.,

Good at LVS/DRC debugging skills and other verifications for lower technology nodes like 7nm, 10nm and 14nm FinFet and below.

Good understanding of Matching, EM, ESD, Latch- Up, Shielding, Parasitic and short channel concepts. Familiar with EDA tools like Cadence VLE/VXL, PVS, Assura and Calibre DRC/ LVS is a must.

Understanding layout effects on the circuit such as speed, capacitance, power and area etc., Ability to understand design constraints and implement high-quality layouts. Responsible for timely execution with high quality of layout design.

Primary Skills :

Analog Layout

Process or technology experience: TSMC 5nm,7nm,10nm,14nm

EDA Tools:

Layout Editor: Cadence Virtuoso L, XL

Physical verification: DRC, LVS, Calibre

Work Model: Hybrid

Job Location: Bangalore who can join immediate to 30 days.

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